Distributed General-Purpose Registers for Embedded Control
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Solution Overview
Problem
Current data processing systems for embedded control processors are inefficient in accessing peripheral or coprocessor data due to the need for load and store instructions, which result in processor stalls and increased power consumption, especially when peripheral or coprocessor registers are not cacheable and lack direct access mechanisms.
Innovation Solution
Implementing distributed general-purpose registers (GPRs) where a portion is located within the processor and another portion is external, allowing direct access and eliminating the need for additional load and store instructions by using a system interconnect to access registers in peripherals or coprocessors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred through peripheral bus and bus bridge, then data transfer between processor and peripheral devices is enabled, but processor is stalled for many cycles and power consumption increases
Solution Approach 1:
The register file is segmented into two distinct parts: local registers within the processor and remote registers in peripheral devices. This segmentation allows the processor to directly access both types of registers without requiring data transfer through the peripheral bus, thereby eliminating processor stalls while maintaining the ability to access peripheral data.
Solution Approach 2:
The register addressing mechanism is made universal to handle both local and remote registers through a unified interface. The instruction execution unit can specify any register (local or remote) using the same register specifier format, enabling the processor to access peripheral device registers directly without requiring separate access mechanisms or additional instructions.
2Productivity
If load and store instructions are used to access peripheral registers, then data transfer is enabled, but additional instructions are required and code density decreases
Solution Approach 1:
The access mechanisms for local and remote registers are merged into a single unified system. Both types of registers are accessed through the same register file interface using the same instruction format, eliminating the need for separate load/store instructions and address calculation instructions. This reduces the total number of instructions required and improves code density.
3Ease of operation
If data is transferred through peripheral bus, then access to peripheral registers is enabled, but power consumption increases due to additional bus cycles
Solution Approach 1:
The peripheral device registers are extracted from the traditional peripheral bus architecture and integrated into the processor's register file system. By taking out the remote registers and making them directly accessible through the processor's existing register interface, the invention eliminates the need for energy-consuming bus transfer cycles while maintaining full accessibility to peripheral data.
Data Source
AI summary
A processing system includes a system interconnect, a processor coupled to communicate with other components in the processing system through the system interconnect, distributed general purpose registers (GPRs) in the processing system wherein a first subset of the distributed GPRs is located in the processor and a second subset of the distributed GPRs is located in the processing system and external to the processor, and a first set of conductors directly connected between the processor and the second subsets of the distributed GPRs. An instruction execution pipeline in the processor accesses any register in the first and second subsets of the distributed GPRs as part of the processor's GPRs during instruction execution in the processor, in which the second subset of the distributed GPRs is accessed through the first conductor.