Distributed IO Control Ring Architecture for Semiconductor Mainframes

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Solution Overview

Problem

Current input/output (IO) control architectures for next-generation mainframes are limited in supporting a high density of process chambers and lack flexibility in chamber positioning, leading to excessive use of long and expensive IO control wires and clean dry air supply lines, which occupy significant space and increase costs.

Innovation Solution

A distributed IO control and interlock ring architecture that utilizes a programmable logic control (PLC) module with an IO network bus and chamber interface IO sub-modules to convert interlock relay signals into digital signals, transmit them over the network, and control slit valves and pneumatics, allowing for modular and flexible attachment of process chambers without the need for extensive cabling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If current centralized IO control architecture is used, then control signals can be transmitted to process chambers, but the number of supported process chambers is limited and excessive cabling is required

Engineering Contradiction:
Improvenumber of supported process chambersVSAvoidcabling complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the centralized IO control system into distributed IO control modules, with each module responsible for controlling a specific process chamber. This segmentation eliminates the need for extensive cabling from a central controller to each chamber, as each chamber has its own dedicated control module that can be independently managed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary IO control module positioned between the mainframe controller and each process chamber. This intermediary module receives control signals from the mainframe and translates them into chamber-specific control actions, enabling flexible chamber attachment without requiring direct cabling from the mainframe to each chamber.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If IO control cables are extended to all facets regardless of chamber attachment, then control coverage is maximized, but cable length and cost increase significantly

Engineering Contradiction:
Improvecontrol coverageVSAvoidcable length
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent implements a dynamic cabling approach where IO control modules are selectively attached to mainframe facets based on chamber presence. Instead of permanent cabling to all facets, the system dynamically configures connections only where needed, reducing cable length and cost while maintaining control coverage for attached chambers.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies local quality by providing IO control capability only at facets where process chambers are actually attached. Each facet receives control resources proportional to its actual usage, eliminating the waste of extending cables and providing control infrastructure to facets that do not require it.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If high density discrete interlock and IO signals are distributed to platform modules, then control precision is maintained, but space occupation and cost increase

Engineering Contradiction:
Improvecontrol signal precisionVSAvoidspace occupation
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges multiple discrete interlock and IO signals into a consolidated communication protocol transmitted over a single network bus. Instead of distributing separate cables for each control signal, the system combines these signals into digital packets that travel through a unified network infrastructure, reducing space occupation while maintaining signal precision through protocol-based data integrity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11586573B2Distributed input/output (IO) control and interlock ring architecture
Publication Date: 2023.02.21 APPLIED MATERIALS INC
  • US11586573B2 patent drawing
  • US11586573B2 patent drawing
  • US11586573B2 patent drawing

AI summary

A system includes a programmable logic control (PLC) module, an input/output (IO) network bus coupled to the PLC module and provided at facets of a mainframe. A first process chamber attached to a first facet of the facets. A chamber interface IO sub-module is attached to the first facet and coupled to the IO network bus and to a process chamber IO controller of the first process chamber. The chamber interface IO sub-module is to: convert interlock relay signals, received via dry contact exchange with the process chamber IO controller, to digital signals; combine the digital signals into network packets adapted for communication using a protocol of the IO network bus; and transmit the network packets to the PLC module over the IO network bus.