Distributed LDO Regulator Structure for Parallel Output Isolation

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Solution Overview

Problem

Conventional LDO regulator designs for system-on-chip (SOC) lead to resource waste and low efficiency due to different load requirements and the inability to connect output ends of LDOs together, resulting in inconvenient use and crosstalk issues.

Innovation Solution

A distributed LDO regulator structure without an external capacitor, comprising a CORE module with a mirror source voltage generating circuit and a built-in LDO regulator circuit, and one or more POWER modules, allowing for parallel connection of POWER modules to achieve greater drive capability and optimal power supply wiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional LDO regulators are designed as independent loop systems with different structures for different load requirements, then each LDO can meet its specific load conditions, but resource waste and low efficiency occur due to completely different operational amplifier structures and compensation structures

Engineering Contradiction:
Improveadaptability to different load conditionsVSAvoidcomplexity of operational amplifier structures and compensation structures
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal LDO regulator structure where a single operational amplifier and compensation structure can serve multiple LDO regulators with different load requirements. The core innovation is that different LDOs share the same operational amplifier and compensation circuitry, eliminating the need for completely different structures for each load condition while maintaining adaptability through configurable parameters

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional LDO regulators use micro-Farad level capacitors at the output end, then loop stability is achieved, but significant resource waste and low efficiency occur

Engineering Contradiction:
Improveloop stabilityVSAvoidresource waste and efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent changes the capacitance parameter from micro-Farad level to much smaller values by modifying the compensation structure. The new structure achieves loop stability with significantly reduced capacitor values, thereby reducing resource waste and improving efficiency while maintaining the required stability performance

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If output ends of different conventional LDOs are connected together, then convenience in use is improved, but loop stability is compromised

Engineering Contradiction:
Improveconvenience of connecting output endsVSAvoidloop stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent segments the LDO regulator into independent modular units where each LDO has its own output stage while sharing common operational amplifier and compensation resources. This segmentation allows output ends to be connected together for convenience while maintaining loop stability through the shared stable compensation structure

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11841723B2Distributed LDO structure without external capacitor
Publication Date: 2023.12.12 SHANGHAI HUALI INTEGRATED CIRCUIT CORP
  • US11841723B2 patent drawing

AI summary

The present application provides a distributed LDO regulator structure without an external capacitor. The structure includes one CORE module; and one or more POWER modules driven by one of the CORE modules. The CORE module comprises a mirror source voltage generating circuit and a built-in LDO regulator circuit. An output end of an operational amplifier and a gate of the sixth PMOS together serve as a control voltage end of the POWER module. A negative input end of the operational amplifier is connected to a drain of the fifth PMOS and a source of the sixth PMOS by means of a first resistor, wherein a connection end serves as an output end of the built-in LDO regulator circuit. POWER modules having the same output voltage are connected to each other in parallel.