Distributed Local ECC for Memory Device Failure Resilience
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing density of RAM in computer systems makes them prone to system-wide failures due to single memory device failures, which can lead to significant downtime and performance impact, as existing error-correcting code implementations either correct many errors in few devices or a few errors across many devices, leaving some failures uncorrectable.
Innovation Solution
A memory system that partitions write data into blocks and generates local error-correcting codes for each memory device, with the option to include a global ECC for additional failure coverage, allowing for distributed error correction across multiple devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error-correcting codes are collectively stored in an additional device to detect and correct specific error conditions, then error correction capability is improved, but device complexity and memory loss increase
Solution Approach 1:
The patent merges the error correction functionality directly into the existing memory devices by distributing local ECC instances across multiple memory devices. Instead of using a separate additional device for ECC storage, each memory device stores both data blocks and corresponding local ECC instances, eliminating the need for dedicated ECC storage hardware while maintaining robust error correction capability.
Solution Approach 2:
The patent segments the global error correction capability into multiple local ECC instances distributed across different memory devices. Each local ECC instance handles error correction for its associated data block independently, allowing parallel error correction operations and reducing the complexity of a centralized ECC system.
2Productivity
If memory device density is increased to grow RAM capacity, then productivity is improved, but reliability deteriorates due to higher probability of failures
Solution Approach 1:
The patent applies preliminary error correction by generating and storing local ECC instances with each data block before errors occur. This proactive approach allows the system to correct errors immediately when they happen, rather than waiting for system failure, thereby maintaining high reliability even as memory density and capacity increase.
Solution Approach 2:
The patent changes the error correction parameter distribution by using multiple local ECC instances instead of a single global ECC system. This parameter change enables independent error correction at the local level, improving overall system reliability as memory capacity scales.
3Reliability
If failed memory modules are isolated temporarily without taking the system down, then system availability is maintained, but memory loss and performance degradation occur
Solution Approach 1:
The patent segments memory operations into independent data blocks with associated local ECC instances. When errors are detected in specific memory devices, only the affected data blocks need to be corrected or relocated, while the rest of the memory system continues operating at full capacity. This granular approach minimizes performance impact compared to isolating entire memory modules.
Solution Approach 2:
The local ECC instances act as intermediaries that enable continuous system operation during error conditions. By providing immediate error detection and correction at the block level, the ECC mechanism serves as a mediator that allows the system to maintain full productivity even when individual memory devices fail.
Data Source
AI summary
According to one embodiment, a memory system includes a plurality of memory devices and a memory controller operatively coupled to the memory devices. The memory controller is configured to partition write data into a plurality of data blocks, where each data block is associated with one of the memory devices. The memory controller is further configured to generate an instance of a local error-correcting code (ECC) corresponding to each data block, and merge each data block with the corresponding instance of the local ECC to form an encoded data block for each memory device. Additionally, the memory controller is configured to write each encoded data block to the memory devices such that each memory device stores one of the data blocks with the corresponding instance of the local ECC. A global ECC and a local ECC of the global ECC can also be included in the memory system.