Distributed Midplanes for Data Storage Signal Integrity
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Solution Overview
Problem
Traditional data storage systems face challenges with signal loss and reduced airflow due to complex midplanes, which become exacerbated as the industry transitions to higher speed protocols and more power-consuming components, leading to increased costs and thermal performance issues.
Innovation Solution
The implementation of a data storage system with distributed, vertically oriented midplanes that reduce signal trace length and allow for improved airflow by using standard card edge connectors and fewer layers, eliminating the need for re-timers and ultra-high-speed connectors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a complex multi-layer midplane is used to provide numerous signal paths, then connectivity between drives and controllers is improved, but signal loss increases and airflow is blocked
Solution Approach 1:
The patent divides the traditional single complex midplane into multiple separate midplanes, each handling a subset of drive connections. Each midplane connects to only one controller, creating modular signal paths that are easier to manage and maintain signal integrity through reduced trace complexity.
Solution Approach 2:
The patent transitions from a horizontal midplane configuration to vertically oriented midplanes standing on their edges. This dimensional change allows airflow to pass through the spaces between midplanes, improving cooling while maintaining electrical connectivity through vertical trace routing on the PCB edges.
2Productivity
If PCIe Gen 5 protocols are implemented for higher speed data transfer, then productivity is improved, but signal loss becomes unacceptable due to long PCB traces
Solution Approach 1:
By segmenting the midplane into multiple smaller units, each with fewer connectors and shorter traces, the patent reduces the length of PCB traces required for high-speed signaling. This segmentation makes it feasible to implement PCIe Gen 5 protocols without excessive signal loss.
Solution Approach 2:
The patent changes the physical orientation of the midplane from horizontal to vertical, which alters the trace routing geometry. This parameter change reduces the effective trace length and improves signal quality for high-speed protocols while maintaining the same functional connectivity.
3Power
If more power-consuming components are used in storage controllers, then processing capability is improved, but thermal performance deteriorates due to blocked airflow
Solution Approach 1:
The patent orients midplanes vertically on their edges, creating channels and spaces between the midplanes that allow airflow to pass through the enclosure. This dimensional reconfiguration improves cooling efficiency for high-power controllers without sacrificing connectivity functionality.
Solution Approach 2:
The patent extracts the midplane from its traditional horizontal position that blocked airflow, and repositions it vertically to allow air circulation. This extraction removes the airflow obstruction while preserving the electrical connection function through alternative trace routing.
4Reliability
If ultra-low loss PCB materials and higher speed connectors are used to compensate for signal loss, then signal quality is improved, but product cost increases significantly
Solution Approach 1:
The patent changes the geometric parameters of the midplane configuration (vertical orientation, reduced trace length) to inherently improve signal quality. This approach eliminates the need for expensive ultra-low loss PCB materials and high-speed connectors, reducing product cost while maintaining signal integrity.
Data Source
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AI summary
A data storage system including a frame, storage drives and a pair of stacked storage controllers. The system also includes a plurality of midplanes each having a PCB with opposing side surfaces, a front edge, a rear edge and a plurality of electrical traces. Each midplane further includes a first midplane connector coupled to the front edge, a second midplane connector coupled to the rear edge and a third midplane connector coupled to the rear edge, where the first connector is coupled to drive connectors and some of the electrical traces, the second connector is coupled to a controller connector and some of the electrical traces and the third connector is coupled to another one of the controller connectors and some of the electrical traces so that the midplanes are vertically oriented in parallel to define spaces therebetween relative to a front to rear direction of the frame.