Distributed Multiplexor Circuit Mitigates Routing Congestion
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Solution Overview
Problem
Conventional multiplexor circuits face routing congestion issues due to a large number of routing wires, which complicates design and fabrication, and dynamic and tristate multiplexors offer limited solutions with increased power consumption and noise degradation.
Innovation Solution
A distributed multiplexor circuit system with multiple stages and select logic that receives data words from multiple connections, using select signals to determine which data word to output, effectively reducing the number of routing wires needed by distributing the multiplexor logic across the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a standard multiplexor circuit uses a large number of routing wires to connect multiple data connections to multiplexor logic, then data selection capability is improved, but routing congestion and design complexity increase
Solution Approach 1:
The multiplexor functionality is segmented into multiple distributed multiplexor stages across the IC. Each stage handles a subset of data connections, breaking down the single complex multiplexor into smaller distributed units that reduce routing congestion while maintaining overall data selection capability.
Solution Approach 2:
The patent transitions from a single centralized multiplexor architecture to a multi-stage distributed architecture, adding temporal and spatial dimensions to the data selection process. Data can be selected across multiple stages rather than requiring all connections to route to a single point simultaneously.
2Device complexity
If dynamic multiplexors are used to address routing congestion, then routing wire requirements are reduced, but power consumption increases
Solution Approach 1:
The patent employs dynamic element selection within each distributed multiplexor stage, where elements are dynamically enabled or disabled based on select signals. This dynamic operation allows routing congestion to be reduced while managing power consumption through selective activation of circuit elements rather than continuous operation.
Solution Approach 2:
Each distributed multiplexor stage operates independently with local select logic, allowing power to be consumed only in the active stages rather than the entire multiplexor circuit. This local operation reduces overall power consumption compared to a single dynamic multiplexor while still addressing routing congestion.
3Device complexity
If tristate multiplexors are used when distances between data connections and multiplexor logic are small, then routing congestion is reduced, but noise degradation increases as distances increase
Solution Approach 1:
By segmenting the multiplexor function into multiple stages distributed across the IC, the patent reduces the distance each data signal must travel. Each stage handles local data connections, preventing long-distance signal transmission that would cause noise degradation while still reducing routing congestion through distributed architecture.
4Adaptability or versatility
If the number of data connections increases in a standard multiplexor circuit, then data selection versatility is improved, but the number of routing wires increases proportionally
Solution Approach 1:
The patent adds temporal dimension to the data selection process by using multiple stages. Instead of requiring all data connections to have direct routing wires to a single multiplexor, data can be selected across multiple stages, reducing the immediate routing wire requirements while maintaining the ability to select from many data connections.
Solution Approach 2:
Each distributed multiplexor stage serves multiple functions: local data selection, signal regeneration, and intermediate buffering. This multi-functionality allows the system to handle increased numbers of data connections without proportionally increasing routing wires, as each stage reuses the same basic multiplexor structure for multiple purposes.
Data Source
AI summary
A multiplexor circuit comprising a plurality of data connections, first stage logic configured to receive a first data word from one of the connections and to transmit the first data word received, and second stage logic configured to receive the first data word from the first stage logic and to select a selected data word between the first data word and a second data word received from another of the plurality of data connections based upon a set of select signals, the second stage logic configured to transmit the selected data word.