Distributed Near RT RIC Architecture for Low Latency

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Solution Overview

Problem

Current Radio Access Networks (RAN) face challenges in achieving low latency and high-speed data processing due to limited computing power at base stations, which hinders the efficient execution of advanced 5G functions.

Innovation Solution

The implementation of a distributed near real-time RIC architecture that separates functions into distinct components operating on different machines, with high-speed non-blocking interfaces and internal non-blocking architectures, allowing for efficient resource allocation and management across Pods, including a datapath Pod, service Pod, and shared data layer Pod, to facilitate low-latency messaging and data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If RIC functions are consolidated in a single component, then device complexity is reduced, but latency increases due to blocking operations and resource contention

Engineering Contradiction:
ImprovelatencyVSAvoidarchitecture complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The RIC is segmented into multiple independent components including near RT RIC, non RT RIC, RAN intelligent controller, and data processing units. Each component operates independently with dedicated resources, eliminating blocking operations and reducing latency while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The architecture transitions from a single-dimensional sequential processing model to a multi-dimensional parallel processing model. Data can flow through multiple independent paths simultaneously (near RT path, non RT path, direct path), adding temporal and spatial dimensions to processing that reduce latency without increasing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If computing functions are distributed across multiple machines, then processing capacity increases, but system complexity and interface requirements increase

Engineering Contradiction:
Improveprocessing capacityVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The RIC components are designed with universal interfaces and standardized protocols that enable them to perform multiple functions. The near RT RIC can simultaneously handle real-time control, data processing, and coordination with non RT RIC, reducing the need for specialized components and simplifying the overall system architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Standardized interface protocols and message formats act as intermediaries between distributed components. These intermediaries abstract the complexity of inter-machine communication, allowing components to be distributed across multiple machines while maintaining simple, uniform interaction patterns

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If blocking interfaces are used for simplicity, then implementation is easier, but critical operations are delayed due to resource contention

Engineering Contradiction:
Improveimplementation easeVSAvoidoperation delay
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The architecture replaces traditional blocking mechanical-like interfaces with non-blocking event-driven communication mechanisms. Instead of synchronous blocking calls that cause delays, the system uses asynchronous event notifications and callback mechanisms that allow critical operations to proceed without waiting for resource availability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11836551B2Active and standby RICs
Publication Date: 2023.12.05 VMWARE INC
  • US11836551B2 patent drawing
  • US11836551B2 patent drawing
  • US11836551B2 patent drawing

AI summary

To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.