Distributed On-Chip Inductors for Low-Ripple Monolithic Voltage Regulation
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Solution Overview
Problem
Off-chip voltage regulator modules are inefficient and slow, leading to significant power loss and inefficiency in power conversion and delivery for high-power integrated circuits due to their distance from the chips they power, which results in higher current requirements and reduced processing power.
Innovation Solution
Implementing on-chip inductors in physical pairs with different clock phases and strategically placing them across voltage domains to minimize voltage ripple and impedance, allowing for more granular control and efficient power distribution within the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If off-chip voltage regulator modules are used, then power regulation can be achieved, but power delivery efficiency deteriorates due to distance from the chip
Solution Approach 1:
The voltage regulator functionality is extracted from the off-chip VRM and integrated directly into the chip, eliminating the physical distance between the regulator and the chip it powers. This integration removes the inefficiencies associated with distant power delivery while maintaining voltage regulation capability.
Solution Approach 2:
The voltage regulator components (inductors, switches, control logic) are nested within the chip substrate, with inductors embedded in the power delivery network layers. This nesting allows the regulator to occupy the same physical space as the chip, eliminating external connections and reducing power loss.
2Loss of energy
If inductors are distributed across voltage domains, then power delivery efficiency improves, but device complexity increases
Solution Approach 1:
The power delivery network is segmented into multiple voltage domains, each with its own distributed inductors. This segmentation allows independent optimization of power delivery in each domain, reducing overall power loss while managing complexity through modular organization of inductors and control logic.
Solution Approach 2:
Different numbers of inductors are placed in different voltage domains based on local power requirements. High-power domains receive more inductors for better regulation, while low-power domains receive fewer, optimizing efficiency without uniformly increasing complexity across the entire device.
3Stability of the object's composition
If inductors are placed in physical pairs with different clock phases, then voltage ripple is reduced, but manufacturing complexity increases
Solution Approach 1:
Inductors are arranged in pairs operating at different clock phases (e.g., 180 degrees out of phase). This periodic action causes the ripple currents from each inductor to cancel each other out, significantly reducing voltage ripple. The phased operation is achieved through interleaved switching control logic.
Solution Approach 2:
The inductor pairs are positioned asymmetrically with respect to their clock phase assignments, with each pair assigned a unique phase relationship. This asymmetric phasing strategy optimizes ripple cancellation while managing the complexity of interconnect routing and control signal distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances power delivery efficiency by reducing voltage ripple, minimizing impedance, and enabling faster transient response, thus improving overall power conversion efficiency and reducing power loss, especially in high-power chips like processors.
Implementation Method 1
An integrated voltage regulators (IVR) may be implemented using inductors (among other components)
Data Source
AI summary
Distributions of on-chip inductors for monolithic voltage regulation are described. On-chip voltage regulation may be provided by integrated voltage regulators (IVRs), such as a buck converter with integrated inductors. On-chip inductors may be placed to ensure optimal voltage regulation for high power density applications. With this technology, integrated circuits may have many independent voltage domains for fine-grained dynamic voltage and frequency scaling that allows for higher overall power efficiency for the system.