Distributed Precharge Circuit Units for Semiconductor Memory

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Solution Overview

Problem

Conventional semiconductor memory apparatuses face increased precharge time due to line load issues, leading to deteriorated operational characteristics and reduced speed, as longer local IO lines increase resistance and capacitance, affecting tCCD and tWRT delays.

Innovation Solution

The semiconductor memory apparatus includes precharge circuit units aligned in the extension direction of data input/output lines, spaced apart to minimize line load, and a precharge controller that distributes the precharge signal through multiple paths with varying delay units to ensure simultaneous activation, thereby stabilizing and accelerating the precharge operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the local IO lines are extended to connect more memory banks, then the connectivity and coverage are improved, but the line load increases due to resistance and capacitance, causing precharge time to increase

Engineering Contradiction:
Improvecoverage of local IO linesVSAvoidprecharge time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The patent divides the single precharge circuit unit into multiple precharge circuit units (first precharge circuit unit and second precharge circuit unit) that are distributed at different positions along the local IO lines. Each precharge circuit unit independently precharges the local IO lines in its vicinity, segmenting the precharge function to reduce the effective precharge distance and line load for each unit, thereby reducing overall precharge time while maintaining coverage of extended memory bank connections

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a single precharge circuit unit is used, then the device complexity is reduced, but the precharge time increases due to the inherent resistance and capacitance of extended lines

Engineering Contradiction:
Improvenumber of precharge circuit unitsVSAvoidprecharge time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent segments the precharge function by placing multiple precharge circuit units at different positions along the local IO lines. This segmentation allows each unit to handle a smaller portion of the total line length, reducing the RC time constant for each segment and enabling faster overall precharge operation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces spatial distribution as a new dimension by positioning precharge circuit units at different locations along the local IO lines rather than using a single centralized unit. This spatial arrangement allows parallel precharging of different line segments, effectively reducing precharge time without proportionally increasing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If multiple precharge circuit units are distributed along the local IO lines, then the precharge time is reduced by minimizing line load, but the device complexity increases

Engineering Contradiction:
Improveprecharge operation speedVSAvoidnumber of precharge circuit units
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The precharge function is segmented into multiple distributed units, each handling a specific segment of the local IO lines. This segmentation enables faster precharge operation by reducing the effective line length and RC time constant for each unit, while the modular nature of the segmentation allows for systematic design and implementation

Inventive Principle:
Principle #1Segmentation

4Device complexity

If the precharge signal is transmitted through a single path, then the control logic is simplified, but the precharge operation becomes unstable due to varying signal delays

Engineering Contradiction:
Improvecontrol logic complexityVSAvoidprecharge operation stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent introduces multiple signal transmission paths by distributing precharge circuit units at different positions along the local IO lines. Each unit receives and processes the precharge signal through its own path, allowing simultaneous independent operation that stabilizes the overall precharge operation by eliminating signal delay variations that would occur in a single sequential path

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7929364B2Semiconductor memory apparatus
Publication Date: 2011.04.19 MIMIRIP LLC
  • US7929364B2 patent drawing
  • US7929364B2 patent drawing
  • US7929364B2 patent drawing

AI summary

Disclosed is a semiconductor memory apparatus capable of improving precharge performance. The semiconductor memory apparatus includes a plurality of memory banks, data input/output lines commonly connected to the memory banks, and a plurality of precharge circuit units connected to the data input/output lines and aligned in an extension direction of the data input/output lines while being spaced apart from each other by a predetermined distance.