Distributed Processing Device Instruction Parsing Storage Access

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Solution Overview

Problem

Traditional computer architectures with a central processing unit (CPU) are insufficient for massive data processing and storage, leading to inadequate computing power and inefficient memory resource utilization due to insufficient data bus bandwidth.

Innovation Solution

A distributed processing system with a processing device coupled to a storage module, featuring an instruction parsing module and a data processing module that receives and analyzes data processing instructions with task type, operation, and address fields, allowing for efficient data processing and storage access, either by processing carried data or accessing storage locations as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a traditional CPU-centric architecture is used, then the system structure is simple, but the computing power is insufficient for massive data processing and the memory resource utilization is inefficient

Engineering Contradiction:

Improvedata processing capabilityVSAvoidsystem architecture complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the traditional CPU-centric architecture into separate functional modules: a processing device with instruction parsing module and data processing module, and a storage module. This segmentation allows independent optimization of processing and storage functions, enabling the system to handle massive data processing tasks while maintaining modular simplicity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an instruction parsing module as an intermediary between the data processing instruction and the data processing module. This intermediary analyzes instructions, determines whether data is carried in the instruction, and routes operations appropriately, thereby simplifying the overall system architecture while improving processing capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If the CPU and memory have different functions in traditional architecture, then the functional separation is clear, but the data bus bandwidth is insufficient for large amount of data interaction

Engineering Contradiction:

Improvedata interaction speedVSAvoiddata bus complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent merges the processing function and storage function into a unified processing device that is coupled to the storage module. The processing device includes both the instruction parsing module and data processing module, allowing data to be processed directly from storage without requiring high-speed data bus transfers between separate CPU and memory components.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The instruction parsing module performs preliminary analysis of data processing instructions to determine whether data is carried in the instruction or if a storage address is provided. This preliminary action enables efficient data retrieval from storage module only when necessary, reducing unnecessary data bus transactions and improving overall data interaction speed.

Inventive Principle:

Principle #10Preliminary action

3Productivity

If the traditional computer architecture is used, then the implementation is straightforward, but the memory resource utilization is inefficient

Engineering Contradiction:

Improvememory resource utilization efficiencyVSAvoidimplementation simplicity

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent implements a feedback mechanism where the instruction parsing module analyzes incoming data processing instructions and determines the appropriate action based on whether data is carried in the instruction or a storage address is provided. This feedback loop enables dynamic adjustment of data retrieval operations, optimizing memory resource utilization while maintaining implementation simplicity through clear decision logic.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11455170B2Processing devices and distributed processing systems

Publication Date: 2022.09.27 MONTAGE TECHNOLOGY CO LTD

AI summary

The present application pertains to a processing device or a distributed processing system using the processing device. The processing device comprises an instruction parsing module configured to receive a data processing instruction indicating a predetermined data processing operation on target data, wherein the data processing instruction comprises a task type field, a data processing operation field, and a data address field; and determine whether the data processing instruction carries the target data according to the task type field; and a data processing module performing the predetermined data processing operation on the target data according to the data processing operation field; wherein, when the data processing instruction carries the target data, the data processing module receives the target data carried by the data processing instruction from the instruction parsing module to perform the predetermined data processing operation on the target data; when the data processing instruction carries the storage address of the target data in the storage module, the processing device accesses the storage module according to the storage address and obtains the target data stored in the storage module.