Distributed Row Counters for Memory Modules

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As technological scaling advances, the increasing size of counting circuits in memory devices to track row hammering phenomena leads to performance degradation and area inefficiency in memory controllers and devices, necessitating a solution to minimize these issues while reducing row hammer risk.

Innovation Solution

Distributing counting circuits across multiple memory devices, allowing each to count the number of accesses to rows and share partial counting circuits, thereby reducing the overall area occupied and maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If counting circuits are implemented in each memory device to track row hammering phenomena, then row hammer risk is reduced, but the area occupied by counting circuits increases and performance degradation occurs

Engineering Contradiction:
Improverow hammer risk reductionVSAvoidcounting circuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The counting circuit functionality is segmented and distributed across multiple memory devices. Each memory device contains a partial counting circuit that counts accesses to its local rows, and these partial counts are combined by the memory controller to achieve complete row hammer protection without requiring full counting circuits in each device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller merges the partial counting results from multiple memory devices to form complete access counts. This combining approach allows the system to achieve comprehensive row hammer protection while keeping individual memory device circuitry minimal.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If counting circuits are implemented in each memory device to track row hammering phenomena, then row hammer risk is reduced, but performance degradation occurs

Engineering Contradiction:
Improverow hammer risk reductionVSAvoidmemory device performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The counting function is segmented between memory devices and the memory controller. Memory devices perform only simple partial counting, while the memory controller handles the complex aggregation and analysis, distributing the computational burden and preventing performance degradation in individual devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller acts as an intermediary that collects partial counting data from multiple memory devices, combines them, and determines row hammer protection actions. This mediator approach allows memory devices to maintain simple, high-performance circuitry while still achieving comprehensive protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240331758A1Memory module, memory device and memory system
Publication Date: 2024.10.03 SK HYNIX INC
  • US20240331758A1 patent drawing
  • US20240331758A1 patent drawing
  • US20240331758A1 patent drawing

AI summary

A memory module includes a plurality of memory devices each including a plurality of rows; and a plurality of row counters each configured to count a number of accesses to a corresponding row among the plurality of rows, and each configured to be distributed and disposed in the plurality of memory devices.