Distributed SAT Solving for Digital Circuit Verification

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Solution Overview

Problem

Current SAT solvers face inefficiencies in handling complex digital circuit verification, often exceeding memory limits due to the complexity of digital designs, necessitating more efficient distributed decision processing methods.

Innovation Solution

The system employs multi-processing element computing with message-passing interfaces to generate and solve multiple replications of a Boolean formula using different solution tactics, allowing communication and information sharing between processing elements to optimize decision processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single SAT solver is used to verify complex digital circuits, then verification completeness is maintained, but memory consumption exceeds limits due to formula complexity

Engineering Contradiction:
Improveverification completenessVSAvoidmemory consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides the single SAT solving task into multiple parallel processes, each handling a replication of the Boolean formula. Multiple processes work simultaneously on different formula replications, distributing the memory load across multiple processes while maintaining verification completeness through coordinated exploration of the solution space.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines results from multiple parallel SAT solving processes through a coordination mechanism. The master process collects and integrates findings from worker processes, merging their contributions to achieve complete verification while each process operates within manageable memory constraints.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If multiple processing elements solve formula replications in parallel, then processing efficiency is improved, but coordination overhead increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcoordination overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a master process as an intermediary that coordinates between multiple worker processes. The master process manages formula distribution, collects results, and orchestrates the parallel solving effort, simplifying the coordination complexity by centralizing control while enabling parallel execution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates multiple copies (replications) of the Boolean formula for parallel processing. Each worker process receives and solves a replication of the original formula, enabling independent parallel execution while the master process coordinates the overall solving effort and integrates results.

Inventive Principle:
Principle #26Copying

3Reliability

If different solution tactics are applied to formula replications, then solving effectiveness is improved, but algorithm complexity increases

Engineering Contradiction:
Improvesolving effectivenessVSAvoidalgorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies different solution tactics to different formula replications based on local characteristics. Each worker process can employ tailored solving strategies appropriate to its specific formula replication, allowing optimized local problem solving while the overall system benefits from diversity in approaches.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent enables dynamic selection and application of different solution tactics across multiple parallel processes. The system can adaptively choose which tactics to apply to which formula replications, allowing flexible exploration of different solving approaches without requiring a single fixed algorithm.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8688619B1Systems, methods and apparatus for distributed decision processing
Publication Date: 2014.04.01 QUALCOMM INC
  • US8688619B1 patent drawing
  • US8688619B1 patent drawing
  • US8688619B1 patent drawing

AI summary

Methods, apparatus, and computer software product for making a decision based on the semantics of formal logic are provided. In an exemplary embodiment, two custom computing apparatuses are used to resolve the satisfiability of a logical formula and provide an example. In this embodiment, the two custom computing apparatuses operate in concert to explore the space of possible satisfying examples. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.