Distributed SMPC Circuit Partitioning for Throughput and Resilience
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Solution Overview
Problem
Standard secure multi-party computation (SMPC) protocols struggle with executing complex computations due to limited computational resources and network bandwidth, making them impractical for large-scale data analytics and machine learning tasks.
Innovation Solution
The system distributes SMPC protocols across multiple computers, employing circuit partitioning, dynamic provisioning, and failure recovery techniques to balance workload, minimize inter-partition communication, and ensure data confidentiality and integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard SMPC protocols are used to ensure data confidentiality and integrity, then security is improved, but computational power and throughput deteriorate due to limited resources
Solution Approach 1:
The patent divides the overall SMPC circuit into multiple partitions that can be processed independently by different computers. This segmentation allows the computational workload to be distributed across multiple nodes, thereby increasing throughput and computational power while maintaining security through the distributed nature of the protocol execution.
Solution Approach 2:
The patent transitions from a single-computer SMPC execution model to a multi-computer distributed model, adding the dimension of spatial distribution. By executing circuit partitions across multiple computers simultaneously, the system achieves parallel processing that enhances computational power and throughput without compromising the security guarantees of the SMPC protocol.
2Productivity
If circuit partitioning is used to distribute computations across multiple computers, then computational power is enhanced, but inter-partition communication overhead increases
Solution Approach 1:
The circuit is segmented into partitions that are distributed across multiple computers. By carefully designing the partitioning strategy, the patent minimizes the number of inputs and outputs that cross partition boundaries, thereby reducing communication overhead while still achieving the benefit of distributed computational power.
Solution Approach 2:
The patent optimizes each partition to be as self-contained as possible, with minimal dependencies on other partitions. This local quality approach ensures that most computations can be performed independently within each partition, reducing the frequency and volume of inter-partition communications and associated overhead.
3Productivity
If circuit partitions are assigned to multiple servicer computers, then throughput is improved, but system complexity increases due to coordination and failure recovery
Solution Approach 1:
The patent establishes a predefined ordering of circuit partitions and assigns them to servicer computers in advance. This preliminary organization of partitions and their execution order simplifies the coordination required during runtime, as the system does not need to dynamically determine which partition should execute next, thereby reducing the complexity of coordination mechanisms.
Solution Approach 2:
The patent implements monitoring of partition completion status and maintains an updated set of eligible partitions. This feedback mechanism allows the system to track progress and manage failure recovery systematically. When a partition completes or a failure occurs, the system can efficiently determine the next actions based on the predefined ordering and eligibility criteria, reducing the complexity of real-time decision-making.
Data Source
AI summary
Disclosed herein are systems and methods for distributed processing of secure multi-party computations. One example method includes dividing an overall SMPC circuit into partitions to be processed by different computers, balancing the computational load across the computers by ensuring the partitions are of similar sizes, identifying and minimizing a number of inputs and outputs crossing partition boundaries to optimize performance and employing a controller computer to orchestrate distributed computational tasks and recover from potential system failures.