Distributed Snoop Filtering for Non-Inclusive Last Level Cache

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Solution Overview

Problem

Current processor architectures with non-inclusive last level caches (LLCs) face challenges in managing cache coherence and snoop filtering, leading to increased core cache and interconnect bandwidth usage due to the absence of cache lines in the LLC, which necessitates additional filtering capabilities.

Innovation Solution

A distributed snoop filtering structure is implemented, where a separate snoop filter tracks MLC-cached lines and the NI LLC includes additional bits to track cache lines' presence in L1 caches, distributing filtering responsibilities between an independent snoop filter and the NI LLC snoop filter to optimize core cache hierarchy efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a non-inclusive LLC is implemented to increase total caching space, then caching capacity is improved, but snoop filtering complexity and bandwidth consumption increase

Engineering Contradiction:
Improvecaching spaceVSAvoidsnoop filtering complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The snoop filtering function is segmented into two separate structures: a traditional snoop filter that tracks MLC-cached lines and an NI LLC snoop filter that tracks L1-cached lines. This segmentation allows each filter to specialize in tracking specific cache levels, reducing the complexity of individual filters while maintaining comprehensive coverage of all cached lines in the non-inclusive hierarchy.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a non-inclusive LLC is implemented to reduce duplicate caching, then caching efficiency is improved, but core cache bandwidth usage increases

Engineering Contradiction:
Improvecaching efficiencyVSAvoidbandwidth usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The distributed snoop filtering structure acts as an intermediary mechanism that enables the non-inclusive LLC to efficiently track cache line locations across the cache hierarchy. By providing accurate location information through separate tracking structures, the system reduces unnecessary snoop traffic and bandwidth consumption while maintaining caching efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If a separate snoop filter is added to track MLC-cached lines, then snoop filtering accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesnoop filtering accuracyVSAvoidfiltering structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The filtering capabilities are merged across two coordinated structures: the traditional snoop filter and the NI LLC snoop filter. Each structure handles a specific portion of the tracking responsibility, and their combined operation provides comprehensive and accurate snoop filtering without requiring a single overly complex filter structure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9727475B2Method and apparatus for distributed snoop filtering
Publication Date: 2017.08.08 INTEL CORP
  • US9727475B2 patent drawing
  • US9727475B2 patent drawing
  • US9727475B2 patent drawing

AI summary

An apparatus and method are described for distributed snoop filtering. For example, one embodiment of a processor comprises: a plurality of cores to execute instructions and process data; first snoop logic to track a first plurality of cache lines stored in a mid-level cache (“MLC”) accessible by one or more of the cores, the first snoop logic to allocate entries for cache lines stored in the MLC and to deallocate entries for cache lines evicted from the MLC, wherein at least some of the cache lines evicted from the MLC are retained in a level 1 (L1) cache; and second snoop logic to track a second plurality of cache lines stored in a non-inclusive last level cache (NI LLC), the second snoop logic to allocate entries in the NI LLC for cache lines evicted from the MLC and to deallocate entries for cache lines stored in the MLC, wherein the second snoop logic is to store and maintain a first set of core valid bits to identify cores containing copies of the cache lines stored in the NI LLC.