Distributed Switch Architecture Tiled Bandwidth Scaling
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Solution Overview
Problem
Cloud networks face challenges in meeting multi-terabit bandwidth requirements while avoiding high cost and power consumption, and existing switch architectures are inefficient in managing traffic and packet buffering.
Innovation Solution
A distributed switch architecture that implements a scalable, low-latency switching system with distributed buffering on ingress, egress, and fabric interconnect, supporting both store-and-forward and cut-through modes of packet transfer, using a tiled structure with intelligent bandwidth scheduling and virtual output queues to optimize packet routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional switch architecture is used to meet multi-terabit bandwidth requirements, then bandwidth capacity is improved, but cost and power consumption increase significantly
Solution Approach 1:
The switch architecture is divided into multiple independent tiles, each handling a portion of the total bandwidth. Each tile contains its own buffering resources and switching logic, allowing the system to scale bandwidth by adding tiles rather than increasing the complexity and power consumption of a single monolithic switch.
Solution Approach 2:
The patent transitions from centralized buffering to distributed buffering across multiple spatial dimensions (different tiles). This dimensional distribution allows bandwidth to scale across tiles while each tile maintains manageable buffering requirements, reducing the power consumption associated with large centralized memory structures.
2Quantity of substance
If centralized buffering is used to manage packet traffic, then packet buffering capacity is improved, but circuit area cost increases
Solution Approach 1:
Buffering capacity is segmented and distributed across multiple tiles rather than concentrated in a single centralized buffer. Each tile contains buffering resources proportional to its bandwidth handling capacity, achieving total system buffering capacity while using less circuit area than a centralized buffer of equivalent total capacity.
3Reliability
If store-and-forward mode is used for packet transfer, then packet routing reliability is improved, but latency increases
Solution Approach 1:
The switch dynamically selects between store-and-forward and cut-through modes on a per-packet or per-flow basis. This dynamic adaptability allows the system to prioritize low-latency cut-through for time-sensitive traffic while maintaining reliable store-and-forward for other traffic, achieving both low latency and high reliability without sacrificing one for the other.
Data Source
AI summary
A distributed switch architecture supports very high bandwidth applications. For instance, the distributed switch architecture may be implemented for cloud networks. The architecture scales by organizing traffic management components into tiled structures with distributed buffering. The tile structures are replicated and interconnected to perform transfers from ingress to egress using an interconnect bandwidth scheduling algorithm. Bandwidth scaling may be achieved by adding more tiles to achieve higher bandwidth. The interconnect in the architecture may be swapped out depending on implementation parameters, e.g., physical efficiency.