Distributed temperature sensing scheme to suppress peak Icc in non-volatile memories
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Solution Overview
Problem
In NAND and other types of non-volatile memory, large current spikes occur during operations like read and write, leading to cumulative spikes when multiple memory dies are operated in parallel, which can result in power consumption issues and performance degradation.
Innovation Solution
A distributed temperature sensing system is used to monitor the temperature of individual memory planes during operations, allowing for real-time adjustment of bias levels to reduce current spikes. Additionally, relative delays are introduced in the operation of parallel memory dies to misalign peak current events, thereby reducing cumulative spikes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple memory dies are operated in parallel to increase performance, then productivity is improved, but current spikes become cumulative and power consumption increases
Solution Approach 1:
The patent introduces periodic temperature sensing operations at specific intervals (e.g., every 16, 32, or 64 memory operations) to detect temperature changes that indicate current spike conditions. By periodically monitoring temperature and dynamically adjusting bias levels based on detected conditions, the system manages power consumption while maintaining high-speed parallel operations. This periodic intervention allows the system to operate at high productivity most of the time while occasionally adjusting parameters to prevent excessive power consumption.
2Measurement precision
If bias levels are increased to improve signal detection during read operations, then measurement precision is improved, but current spikes increase and power consumption rises
Solution Approach 1:
The patent implements a feedback mechanism where temperature sensors continuously monitor the temperature of memory planes during operations. When temperature changes indicate that current spikes are occurring (which would necessitate higher bias levels for signal detection), the system responds by adjusting bias levels downward to reduce power consumption. This feedback loop allows the system to maintain measurement precision only when necessary while reducing power consumption during normal operations.
Solution Approach 2:
The patent dynamically changes operating parameters (bias levels) based on detected temperature conditions. When temperature sensing indicates current spike conditions, the system adjusts bias levels to an adjusted value that reduces current spikes while still allowing for adequate signal detection. This parameter adjustment resolves the contradiction by adapting the bias level to actual operating conditions rather than maintaining a fixed high level.
3Reliability
If temperature sensing is implemented to monitor memory plane conditions, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent integrates temperature sensing functionality into existing memory plane structures, allowing the same hardware infrastructure to serve multiple functions: normal memory operations and temperature monitoring. By utilizing existing planar structures and integrating sensors within the memory architecture rather than adding separate monitoring systems, the patent improves reliability through temperature awareness while minimizing the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces current spikes and associated power consumption, improving the performance and efficiency of non-volatile memory systems by optimizing current management and temperature monitoring.
Implementation Method 1
A distributed temperature sensing system is used to monitor the temperature of individual memory planes during operations
Implementation Method 2
large current spikes occur during operations like read and write, leading to cumulative spikes when multiple memory dies are operated in parallel
Data Source
AI summary
To reduce Icc spikes during the operation of a non-volatile memory device, a distributed temperature sensing system individually monitors each plane of a memory die during memory operations. Icc levels during a memory operation are temperature dependent. By monitoring the temperature of the individual memory planes during an operation, the bias levels for performing the operation can be changed during the course of that operation in order to reduce Icc spikes during the operation. For example, during a write operation if the temperature increase of a plane exceeds a threshold during earlier programming loops, the bias conditions, such as word line or bit line bias voltages, can be altered for later programming loops of the write operation.