Distributed Time-Deterministic Processor for Synchronized Control Systems
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Solution Overview
Problem
Current control, test, and measurement systems face challenges in achieving precise synchronization and scalability due to limitations in centralized architectures, which restrict speed, accuracy, and flexibility, especially as the number of inputs/outputs and complexity increase.
Innovation Solution
A distributed time-deterministic processing system using a Time-Deterministic Processor (TDP) that synchronizes all modules with a common clock signal and shared trigger signals, allowing for precise timing and synchronization across multiple modules, enabling scalable and accurate execution of control, test, and measurement tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a centralized master controller is used to monitor and control all actions, then synchronization and control capabilities are improved, but system speed and scalability are limited
Solution Approach 1:
The system divides the centralized controller into multiple distributed modules, each capable of autonomous processing. The master controller is segmented into several slave modules that can operate independently while maintaining synchronization through shared trigger signals, thereby increasing processing speed while preserving synchronization capabilities.
Solution Approach 2:
The system transitions from a single-dimensional centralized control architecture to a multi-dimensional distributed architecture. By adding the dimension of parallel processing across multiple modules while maintaining temporal synchronization through shared triggers, the system achieves both high speed and reliable synchronization.
2Adaptability or versatility
If the number of modules is increased to improve scalability, then system capacity is improved, but trigger signal propagation complexity increases
Solution Approach 1:
The system implements a universal trigger signal protocol that can be applied to any number of modules without changing the fundamental architecture. Each module receives and processes the same type of trigger signals, allowing scalable addition of modules without increasing propagation complexity, as the trigger distribution mechanism remains consistent regardless of module count.
3Adaptability or versatility
If distributed architecture is used to improve scalability and flexibility, then adaptability is improved, but synchronization precision deteriorates
Solution Approach 1:
The system incorporates feedback mechanisms where modules monitor and adjust their operation based on shared trigger signals and common clock references. This feedback loop ensures that even in a distributed architecture, all modules maintain precise synchronization by continuously referencing the same temporal benchmarks and adjusting for any drift or timing variations.
Solution Approach 2:
The system creates a temporal equipotential state across all distributed modules by using shared trigger signals and common clock references. All modules operate from the same temporal reference plane, ensuring that despite physical distribution, synchronization precision is maintained as if all modules were at the same potential point in time.
4Productivity
If custom designed systems are used to achieve required performance, then processing capability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The system uses standardized module designs that can be replicated and copied multiple times. Instead of custom-designing each module, the same proven module architecture is copied and distributed throughout the system, maintaining high processing capability through parallelism while significantly reducing manufacturing complexity and cost through standardization.
Data Source
AI summary
Systems for time-deterministic, distributed and synchronized execution for control, test and measurement applications, consisting of one or more modules (M0, . . . , Mn) that share at least one trigger signal and one clock signal and comprising a Time-Deterministic Processor, which uses the clock signal and one or more of the trigger signals shared by all modules (M0, . . . , Mn) to run a program distributed across multiple modules (M0, . . . , Mn) with precise control of instant of execution of each instruction and synchronize the execution of all or a subset of modules (M0, . . . , Mn). The Time-Deterministic Processor communicates with a common signal bus to all modules (M0, . . . , Mn), comprising a control bus which share at least a clock and trigger signals. Optionally, the signal bus includes a communication bus with which the time-deterministic processor in the modules (M0, . . . , Mn) communicates with each other and optionally with a host processor or external computer.