Distributed Timestamp Counter Synchronization via Time Advance Signals
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Solution Overview
Problem
In distributed measurement and control systems, especially those using IEEE 1588 Standard for Precision Clock Synchronization Protocol, timestamp counters across multiple devices often exhibit variances due to clock differences and routing delays, leading to inaccuracies that are not precise enough, especially as packet and processing rates increase.
Innovation Solution
A time advance signal is distributed to each device, allowing each timestamp counter to independently determine when to advance its timestamp value based on its clock signal, with a time advance generator periodically generating this signal to maintain consistency across devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If distributed architecture with independent timestamp counters is used in each device, then system scalability and decentralization are improved, but timestamp synchronization precision deteriorates due to clock variances and routing delays
Solution Approach 1:
The system implements a feedback mechanism where a master device monitors timestamp values from slave devices and sends time advance signals back to adjust their counters. This closed-loop feedback ensures that despite the distributed architecture, all devices maintain synchronized timestamps by continuously correcting deviations detected through the feedback channel.
Solution Approach 2:
A master device acts as an intermediary between the time source and slave devices. It receives time information, processes it, and distributes corrected time advance signals to slave devices. This intermediary coordinates the timestamp counters across all devices, ensuring synchronization while preserving the benefits of distributed architecture.
2Reliability
If IEEE 1588 Protocol is used for clock synchronization, then clock synchronization capability is improved, but timestamp accuracy deteriorates due to jitter introduced by Ethernet and local area network technologies
Solution Approach 1:
The system performs preliminary compensation by calculating time advance values before timestamps are generated. The master device determines the required time adjustment in advance and sends correction signals to slave devices before they generate timestamps, thereby preventing jitter from affecting timestamp accuracy rather than correcting it afterward.
Solution Approach 2:
The system applies partial correction by sending time advance signals that adjust only the specific portion of timestamp values affected by jitter. Rather than completely regenerating timestamps, the system applies targeted corrections to the affected timestamp portions, reducing the impact of Ethernet jitter while maintaining overall timestamp accuracy.
Data Source
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Figure 3B
AI summary
When timestamp counters are distributed among multiple physical devices, variances in their timestamp values can occur, such as, but not limited to those cause by variances among clocks in these different devices, different routing delays, different components, etc. These differences may be same, but still not allow high enough precision, especially as packet and processing rates continue to increase (which also causes clocking rates of devices to increase). One implementation distributes a time advance signal to each of these devices, which each device independently uses to determine when to advance its timestamp counter in response to its clock signal. These timestamps may be generated according to IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems; and/or Physical Layer Transceivers (PHYs) may be disposed in each of the different physical devices.