Distributed Uplink Packet Routing in System-on-Chip Base Stations
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Solution Overview
Problem
Conventional wireless communication base stations face scalability issues and bottlenecks in handling large numbers of users due to centralized packet data convergence protocol (PDCP) entities and hardware accelerators, which become bottlenecks and single points of failure when processing uplink radio bearers.
Innovation Solution
Distributing the burden of generating MAC headers for uplink packets across software-defined system-on-a-chip (SOC) devices, each appending a first MAC header and encapsulating the packet in a second MAC header, with hardware acceleration engines removing the external header upon transmission, and maintaining a table of MAC addresses for efficient routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If centralized PDCP entities and hardware accelerators are used to process uplink radio bearers, then processing capability is improved, but scalability and reliability deteriorate due to bottlenecks and single points of failure
Solution Approach 1:
The patent divides the centralized PDCP entity into multiple distributed PDCP entities across different SOC devices. Each SOC device independently processes uplink packets from specific radio bearers, eliminating the single point of failure and bottleneck created by centralized processing. This segmentation allows the system to scale by adding more SOC devices while maintaining reliability.
2Productivity
If multiple modem boards with multi-core processors are deployed to support more carriers and users, then system capacity is improved, but device complexity and cost increase
Solution Approach 1:
The patent merges the PDCP entity directly into the SOC device, combining previously separate functions (PDCP processing and baseband processing) into a single integrated unit. This eliminates the need for separate controller boards and modem boards, reducing device complexity and inter-board interfaces while maintaining the ability to support multiple carriers and users through software-defined functionality.
Solution Approach 2:
The SOC device is designed as a universal platform that can perform multiple functions: it acts as both a PDCP entity and a baseband processing unit, and can be software-defined to support different carrier configurations. This multi-functionality replaces the need for specialized hardware boards for each function, reducing overall system complexity.
3Quantity of substance
If dedicated memory devices are provided for each controller board and modem board, then storage requirements are met, but device complexity and cost increase
Solution Approach 1:
The patent merges the previously separate memory resources of controller boards and modem boards into a single shared memory pool within the SOC device. This consolidation reduces the total number of memory devices required while providing sufficient storage capacity for all SOC devices in the system, thereby reducing device complexity and cost.
Data Source
AI summary
A first system-on-a-chip (SOC) device is configured to connect to a backplane interface that is connected to a second SOC device. The first SOC device includes one or more processors to encapsulate an uplink radio bearer packet received at the first SOC device in a first header to form a first encapsulated packet. The first header includes a first address of a destination that is connected to the second SOC device by a backhaul network. The processors are also configured to encapsulate the first encapsulated packet in a second header to form a second encapsulated packet. The second header includes a second address of the second SOC device. The first SOC device also includes a hardware acceleration engine configured to transmit the second encapsulated packet from the first device board over the backplane interface.