Distribution Engine Virtual Concatenation Traffic Mapping
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Solution Overview
Problem
Existing methods for transporting high-speed packet flows over optical transport networks (OTNs) fail to evenly distribute packets across multiple circuits, leading to underutilization of bandwidth and congestion, particularly at data rates exceeding 1 Gbit/sec.
Innovation Solution
The implementation of a node with a packet network interface, ethernet switch, and distribution engine that maps packets into virtual concatenation groups (VCGs) and distributes bits across multiple circuits using optical channel data units, allowing for even distribution and reconstruction at the destination node without relying on packet lookup mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional packet switching methods are used to transport high-speed packet flows over optical networks, then packet transmission is supported, but bandwidth utilization is poor and congestion occurs due to uneven distribution across multiple circuits
Solution Approach 1:
The patent segments packet flows into multiple virtual concatenation groups (VCGs), which are then distributed across multiple optical circuits. This segmentation allows for more granular control and even distribution of traffic, improving bandwidth utilization and preventing congestion on individual circuits.
Solution Approach 2:
The patent introduces a new dimension of distribution by mapping packets to virtual concatenation groups and then to specific optical circuits based on VCG membership. This multi-dimensional mapping approach (packet → VCG → circuit) enables more sophisticated load balancing and even distribution across the network infrastructure.
2Ease of operation
If packet lookup mechanisms are used for forwarding decisions, then packet routing is achieved, but distribution across multiple circuits is uneven leading to underutilization
Solution Approach 1:
The patent performs preliminary action by pre-establishing virtual concatenation groups and pre-determining circuit assignments before actual packet transmission. Packets are mapped to VCGs in advance, and the distribution pattern is predetermined, eliminating the need for complex real-time lookups while ensuring even distribution across circuits.
Solution Approach 2:
The patent creates virtual copies of circuit paths through virtual concatenation groups. Instead of directly routing packets through complex lookup tables, the system creates virtual pathway copies (VCGs) that replicate the distribution pattern, simplifying the forwarding process while maintaining even load distribution.
3Speed
If data rates exceed 1 Gbit/sec, then high-speed transmission is achieved, but congestion and packet loss increase due to inability to evenly distribute traffic
Solution Approach 1:
At high data rates exceeding 1 Gbit/sec, the patent segments the high-speed packet flow into multiple virtual concatenation groups that are distributed across multiple optical circuits. This segmentation prevents any single circuit from becoming a bottleneck, maintaining both high transmission speed and reliable packet delivery by parallelizing the data flow.
Solution Approach 2:
The patent implements dynamic distribution where packets are continuously mapped to different virtual concatenation groups and circuits based on current network conditions and traffic patterns. This dynamic approach allows the system to adapt to varying load conditions at high speeds, preventing congestion and maintaining packet delivery reliability.
Data Source
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AI summary
A node comprising a packet network interface, an ethernet switch, an optical port, and a distribution engine. The packet network interface adapted to receive a packet having a destination address and a first bit and a second bit. The ethernet switch is adapted to receive and forward the packet into a virtual queue associated with a destination. The optical port has circuitry for transmitting to a plurality of circuits. The distribution engine has one or more processors configured to execute processor executable code to cause the distribution engine to (1) read a first bit and a second bit from the virtual queue, (2) provide the first bit and the second bit to the at least one optical port for transmission to a first predetermined group of the plurality of circuits.