Dithered NCO Phase Splitter for High-SFDR Small-Area Synthesis
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Solution Overview
Problem
Numerically-controlled oscillators (NCOs) face challenges in achieving high spurious-free dynamic range (SFDR) while minimizing the size of the phase accumulator's output, which leads to increased cell area requirements in integrated circuits due to the need for larger lookup tables.
Innovation Solution
The implementation of a dithered splitter using a pseudo-random binary sequence (PRBS) to separate the instantaneous phase into a dithered course phase and fine phase, allowing for a polynomial approximation unit to generate discrete sinusoidal signals, thereby reducing the size of the lookup table required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of bits in the PA output is increased to meet the SFDR requirement, then the SFDR is improved, but the size of the LUT increases, leading to increased cell area
Solution Approach 1:
The patent segments the phase accumulator output into two separate paths: a coarse phase path and a fine phase path. The coarse phase uses fewer bits and indexes a smaller LUT, while the fine phase uses the remaining bits for polynomial approximation. This segmentation allows the system to achieve high SFDR without requiring a single large LUT, thus reducing cell area while maintaining performance.
2Measurement precision
If the number of bits in the PA output is increased to meet the SFDR requirement, then the SFDR is improved, but the capacity of the LUT increases, requiring more cell area
Solution Approach 1:
The patent divides the phase word into coarse and fine components, where the coarse phase (fewer bits) indexes the LUT and the fine phase (remaining bits) is processed separately through polynomial approximation. This segmentation reduces the LUT capacity requirement while preserving the total frequency resolution, as the fine phase information is not lost but processed through an alternative method.
Solution Approach 2:
The patent replaces the traditional single LUT-based phase-to-amplitude conversion with a hybrid approach combining a smaller LUT and a polynomial approximation unit. This substitution reduces reliance on large memory structures (LUT capacity) and uses computational mathematics (polynomial approximation) to handle the fine phase resolution, thereby reducing device complexity.
Data Source
AI summary
A numerically-controlled oscillator (NCO) includes a phase accumulator (PA) which has a first input adapted to receive a phase increment, a second input adapted to receive a clock signal, and a third input adapted to receive a reset signal. The PA provides an instantaneous phase at an output. The NCO includes a dithered splitter which has an input coupled to receive the instantaneous phase. The dithered splitter dithers the instantaneous phase using a pseudo-random binary sequence (PRBS) and provides a dithered course phase and a dithered fine phase. The NCO includes a polynomial approximation unit which has a first input coupled to receive the dithered course phase and a second input coupled to receive the dithered fine phase. The polynomial approximation unit provides a sequence of numbers representing a discrete sinusoidal signal.