Dithered Spur Reduction Circuit With Correlation Noise Cancellation

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Solution Overview

Problem

Digital delta-sigma modulators (DDSMs) generate spurious tones due to cyclical patterns in their output, which can be audible in audio systems and disruptive in fractional-N synthesizers, and existing techniques like dithering and deterministic approaches either introduce noise or are unreliable in completely eliminating these spurs.

Innovation Solution

A circuit that includes a dither signal generator producing a dither signal with a maximum amplitude comparable to the input signal, combined with a deamplifier to reduce the input signal amplitude, and a summer to sum these signals, followed by modulation and cancellation of the dither component to produce a spur-reduced output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If dithering is applied to reduce spurious tones, then spurious tones are reduced, but noise is introduced into the output signal

Engineering Contradiction:
Improvespurious tonesVSAvoidnoise
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The patent extracts and removes the dither signal component from the modulator output through correlation processing. By correlating the output signal with the known dither signal and subtracting the correlated component, the dither noise is separated and removed while preserving the desired signal and spurious tone suppression benefits

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a feedback mechanism where the dither signal is fed back into the system and used for correlation-based cancellation. The known dither sequence is correlated with the modulator output to identify and remove the dither noise component, creating a closed-loop system that eliminates the harmful noise effect

Inventive Principle:
Principle #23Feedback

2Object-generated harmful factors

If deterministic approaches are used to eliminate spurs, then spurious tones are reduced, but reliability is compromised due to sensitivity to initial conditions

Engineering Contradiction:
Improvespurious tonesVSAvoidreliability
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent employs a self-service approach where the system uses its own known dither signal to identify and cancel the spurious tones. The deterministic dither sequence serves both to break up cyclical patterns (reducing spurs) and to provide a reference for cancellation, making the system self-correcting and reliable regardless of initial conditions

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces the dither signal as an intermediary element that mediates between the input signal and the modulator output. This known intermediary signal enables the system to identify and remove spurious components through correlation, providing a reliable method that is not sensitive to initial conditions

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If cycle length is increased to reduce spurs, then spurious tones are reduced, but device complexity increases

Engineering Contradiction:
Improvespurious tonesVSAvoiddevice complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent changes the parameter of cycle length by using a longer deterministic dither sequence, which increases the period before repetition. This parameter change reduces spurious tones by preventing short-cycle cyclical patterns, while the implementation remains relatively simple through correlation-based processing

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8730076B2Spur reduction circuit
Publication Date: 2014.05.20 QUALCOMM TECH INT
  • US8730076B2 patent drawing
  • US8730076B2 patent drawing
  • US8730076B2 patent drawing

AI summary

A circuit for modulating an input signal including a dither signal generator configured to generate a first dither signal having a maximum amplitude, a deamplifier configured to reduce the amplitude of said input signal so as to generate a deamplified input signal having a maximum amplitude that is comparable to the maximum amplitude of the dither signal, and a summer configured to sum the dither signal with the deamplified input signal.