Dithering Circuit Power Management for Flat Panel Displays
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Solution Overview
Problem
Modern flat panel displays consume significant power due to repeated image processing operations during the panel self-refresh (PSR) mode, even when no image updates occur, leading to high power consumption.
Innovation Solution
An image processing apparatus and method that includes a first memory for storing an input frame, a series of image processing circuits for generating intermediate frames, and a dithering circuit for performing dithering operations on these frames to produce output frames, allowing the image processing circuits to enter a low power state after generating the first output frame, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If image processing circuits repeatedly process input frames during PSR mode, then display output is maintained, but power consumption increases
Solution Approach 1:
The patent segments the image processing pipeline into multiple independent circuits (first image processing circuit, second image processing circuit, dithering circuit). During PSR mode, only the dithering circuit remains active to process stored intermediate frames, while other circuits enter low-power states. This segmentation allows selective operation of processing stages, maintaining display output while reducing overall power consumption.
Solution Approach 2:
The patent performs preliminary image processing operations during normal mode to generate and store intermediate frames in memory before PSR mode begins. This preliminary action prepares processed frame data in advance, allowing the system to skip repeated full processing during PSR mode and only perform lightweight dithering operations, thereby reducing power consumption while maintaining display continuity.
2Adaptability or versatility
If receiver circuit continuously receives input frames, then image updates are processed, but power consumption increases during still images
Solution Approach 1:
The patent implements dynamic operation modes for the receiver circuit and image processing circuits. During still image display, the receiver circuit stops receiving input frames and processing circuits enter low-power states. When image updates are detected, the system dynamically transitions back to active reception and processing. This dynamic adaptation allows the system to maintain image update capability while significantly reducing power consumption during static display periods.
3Manufacturing precision
If all image processing circuits operate sequentially, then complete image processing is achieved, but power consumption is high during PSR mode
Solution Approach 1:
The patent extracts and isolates the dithering circuit as a separate, independently operable unit from the main image processing pipeline. During PSR mode, the dithering circuit is extracted to continue operation while other processing circuits are powered down. This extraction allows the system to maintain essential image processing quality (through dithering operations) while eliminating power consumption from non-essential processing stages.
Solution Approach 2:
The patent applies local quality by maintaining high-processing quality only where necessary (dithering circuit) while reducing processing elsewhere (other image processing circuits). The dithering circuit continues to perform quality-enhancing dithering operations on stored frames, ensuring local image quality is preserved, while other circuits enter low-power states, achieving overall power reduction without sacrificing essential processing quality.
Data Source
AI summary
An image processing apparatus and an image processing method are provided. The image processing apparatus includes a first memory, a plurality of image processing circuits, a first image processing circuit and dithering circuit. The first memory is utilized for storing an input frame. The image processing circuits are utilized for sequentially performing respective image processing operations on the input frame to generate a first intermediate frame. The first image processing circuit is utilized for performing a first image processing operation on the first intermediate frame to generate a second intermediate frame and writing the second intermediate frame into the first memory. The dithering circuit is utilized for performing a dithering operation on the second intermediate frame transmitted from the first image processing circuit to generate a first output frame and performing the dithering operation on the second intermediate frame read from the first memory to generate a second output frame.