Dithering Circuit for SENT Protocol Nibble Detection
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Solution Overview
Problem
The SAE J2716 SENT protocol requires a high clock frequency for accurate nibble period detection, which is not feasible with many microcontrollers' on-chip clock sources, leading to power consumption issues and resource inefficiencies.
Innovation Solution
A dithering circuit that divides the system clock by a factor that evenly divides the calibration pulse length, allowing for accurate nibble period detection using a lower frequency oscillator, such as dividing the CPU clock by 7, 14, or 28, and dithering each unit time based on the division remainder to generate a dithered sampling clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high clock frequency is used for accurate nibble period detection, then measurement precision is improved, but power consumption increases and microcontroller resources are strained
Solution Approach 1:
The patent implements dynamic clock frequency adjustment by using a high clock frequency only during the critical measurement period (nibble detection) and switching to a lower frequency for other operations. The microcontroller dynamically changes its operating state based on whether measurement is currently needed, thus achieving high measurement precision only when required while minimizing overall power consumption.
Solution Approach 2:
The system employs periodic high-frequency clock activation synchronized with the periodic arrival of SENT protocol frames. The high clock frequency is activated periodically during calibration and measurement phases, then deactivated during idle periods. This periodic action ensures measurement precision is available when data arrives while reducing average power consumption during idle intervals.
2Measurement precision
If a high clock frequency is used for accurate nibble period detection, then measurement precision is improved, but microcontroller resource availability deteriorates
Solution Approach 1:
The microcontroller dynamically adjusts its clock frequency based on operational requirements. During SENT protocol measurement and calibration, the system switches to high clock frequency mode to ensure accurate timing. During other tasks such as data processing, communication, or idle periods, the system switches to lower frequency modes, thereby making CPU cycles and other resources available for other functions while maintaining measurement precision when needed.
Solution Approach 2:
The system alternates between high-frequency operation during measurement windows and low-frequency operation during inter-frame periods. This periodic switching allows the microcontroller to dedicate full resources to precise nibble period detection when SENT frames are being received, then release those resources for other tasks during idle periods, thus improving both measurement precision and overall system adaptability.
3Use of energy by moving object
If clock frequency is reduced to save power, then power consumption is reduced, but measurement precision deteriorates
Solution Approach 1:
The patent implements periodic high-frequency clock activation that coincides with the periodic arrival of SENT protocol frames. During these brief measurement windows, the clock runs at high frequency to ensure accurate nibble period detection. Between frames, the clock frequency is reduced or stopped entirely. This timing-synchronized approach ensures measurement precision is maintained during critical periods while achieving significant power savings during idle periods.
Solution Approach 2:
The system dynamically adjusts clock frequency based on the real-time state of data reception. When a SENT frame is detected and measurement is required, the clock frequency is elevated to the necessary level for accurate timing. Once the measurement is complete and no data is being received, the frequency is dynamically reduced. This dynamic adaptation ensures measurement precision is available on-demand without paying the power cost continuously.
4Adaptability or versatility
If clock frequency is reduced to use available resources, then resource efficiency is improved, but measurement precision deteriorates
Solution Approach 1:
The system employs periodic high-frequency operation that aligns with the periodic nature of SENT protocol communication. During each frame reception event, the microcontroller temporarily activates high-frequency clocking to perform accurate nibble period detection. During the intervals between frames, the system operates at lower frequency to conserve resources for other tasks. This periodic resource allocation ensures measurement precision is available when data arrives while maintaining high resource efficiency during idle periods.
Solution Approach 2:
The microcontroller dynamically switches between high and low clock frequency modes based on the operational context. When SENT protocol measurement is required, the system transitions to high-frequency mode to ensure accurate timing. For other operations such as data processing, wireless communication, or idle states, the system transitions to low-frequency mode to maximize resource availability. This dynamic resource management resolves the contradiction by providing high measurement precision only when absolutely necessary.
Data Source
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AI summary
A system for determining a unit time of a serial transmission protocol, wherein the serial transmission protocol defines a unit time (UT) by transmitting a calibration pulse having a predetermined length of N*UT and wherein a receiver is operated by system clock, includes: a clock divider for dividing the system clock by M, wherein M evenly divides N, and a detector for sampling a received data nibble length by using a dithered sampling clock.