Divider Unit Phase Synchronization for Stable Up-Converter Power

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In digital circuits, divider unit phases are often unsynchronized, leading to unpredictable up-converter output power, especially in polar transmitters, which affects the accuracy of transmission power control in CDMA systems.

Innovation Solution

A method and apparatus for synchronizing phases of divider units by powering on a master divider unit to provide a reference signal, and synchronizing a slave divider unit to this reference signal using a digitally controlled oscillator, with a delayed power-on pulse to ensure phase alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple divider units are used to increase output power, then the up-converter output power amplitude increases, but the phases of the divider units become unsynchronized causing unpredictable output power

Engineering Contradiction:
Improveup-converter output powerVSAvoidoutput power stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The system divides the clock generation function into multiple independent divider units (first divider unit, second divider unit, etc.), each capable of operating independently but synchronized through a master-slave relationship to achieve both power scaling and phase coherence

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The master divider unit is powered on first to establish a reference clock signal before the slave divider units are activated. This preliminary action ensures that when slave units are powered on, they synchronize to an already-stable reference, preventing phase instability

Inventive Principle:
Principle #10Preliminary action

2Productivity

If divider units are powered on simultaneously, then the system operates faster, but phase synchronization cannot be established leading to power cancellation

Engineering Contradiction:
Improvesystem startup speedVSAvoidphase synchronization accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The master divider unit is powered on first to establish a reference clock signal before the slave divider units are activated. This preliminary action ensures that when slave units are powered on, they synchronize to an already-stable reference, preventing phase instability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Slave divider units synchronize their phases to the master divider unit's reference clock signal through continuous feedback monitoring. This feedback mechanism ensures that even if power-on timing varies, the phases remain synchronized during operation

Inventive Principle:
Principle #23Feedback

3Reliability

If the master divider unit remains powered on continuously, then phase reference is always available, but power consumption increases

Engineering Contradiction:
Improvephase reference availabilityVSAvoidmaster divider power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The master divider unit operates in periodic cycles rather than continuously. It activates to provide reference signals, allows slave units to synchronize, then enters a low-power state. This periodic operation maintains phase reference availability while significantly reducing average power consumption

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

Slave divider units are designed to maintain their synchronized phase state without continuous reference signals. They can operate autonomously for periods using their internal phase memory, allowing the master unit to enter low-power mode while slave units continue functioning

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7965111B2Method and apparatus for divider unit synchronization
Publication Date: 2011.06.21 QUALCOMM INC
  • US7965111B2 patent drawing
  • US7965111B2 patent drawing
  • US7965111B2 patent drawing

AI summary

A method an apparatus for synchronizing phases of one or more divider units comprise powering on a master divider unit to provide a reference signal. A phase of a slave divider unit is synchronized to the reference signal from the master divider unit by providing a power on pulse at the slave divider unit, synchronizing the phase of the slave divider unit to the reference signal using a digitally controlled oscillator, and powering on the slave divider unit after a first predetermined delay period following a rising edge of the power on pulse. By synchronizing a slave divider unit to the reference signal from the master divider unit, any number of slave divider units may be powered on and in-phase with each other.