DIVOT Bus Authentication via Impedance Measurement
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Solution Overview
Problem
Existing secure computing architectures are inadequate in protecting against physical attacks such as probing and tampering on memory buses and memory modules, and they incur substantial performance overheads.
Innovation Solution
The DIVOT system uses a time domain reflectometer circuit embedded in a computer chip to detect impedance changes in transmission lines, providing two-way physical authentication of memory buses and detecting physical probing and tampering without interfering with normal data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory encryption and Oblivious RAM are used to protect data from physical attacks, then security against physical attacks is improved, but performance overhead increases substantially
Solution Approach 1:
The patent replaces complex encryption hardware and software mechanisms with a simplified electrical impedance measurement approach. Instead of using encryption circuits and ORAM protocols that incur performance overhead, the invention uses a time-domain reflectometer to measure electrical characteristics of the memory bus, achieving security through physical layer authentication without substantial performance penalty
Solution Approach 2:
The memory bus itself serves as the authentication medium by utilizing its inherent electrical impedance characteristics. The system authenticates the memory module through the unique electrical fingerprint of the bus traces, eliminating the need for separate encryption keys or authentication hardware that would add performance overhead
2Reliability
If IBM 4765 Secure Coprocessor with Faraday cage and sensors is used, then tamper resistance is improved, but cost increases prohibitively
Solution Approach 1:
The patent uses inexpensive electrical measurement circuits instead of expensive physical security enclosures. The authentication mechanism relies on measuring electrical impedance through standard circuit components rather than implementing costly Faraday cages, sensor arrays, and tamper-resistant physical barriers
Solution Approach 2:
The invention extracts the essential security function from complex physical security systems by isolating the electrical characteristic measurement aspect. Instead of implementing entire secure coprocessors with multiple security layers, the patent extracts and utilizes only the electrical impedance fingerprinting capability, eliminating unnecessary complexity and cost
3Measurement precision
If authentication circuits are added to detect impedance changes, then detection accuracy is improved, but hardware complexity increases
Solution Approach 1:
The patent merges the authentication function with the existing memory controller hardware. The time-domain reflectometer circuit is integrated into the memory controller, sharing resources and infrastructure with normal memory operations, thereby achieving accurate impedance measurement without proportionally increasing overall hardware complexity
Solution Approach 2:
The authentication circuit serves multiple functions: it performs impedance measurements for authentication, monitors bus health, and can detect various types of physical attacks. This multi-functionality justifies the added hardware complexity by providing comprehensive security and diagnostics capabilities from a single integrated circuit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The DIVOT system effectively authenticates transmission lines and detects physical tampering with high accuracy, completing authentication and tamper detection within 50 μs and achieving a probability of correct identification close to 1 with an equal error rate of less than 0.06%, thus providing strong defenses against physical attacks.
Implementation Method 1
a time domain reflectometer circuit embedded in a computer chip to detect impedance changes in transmission lines
Implementation Method 2
a positive input of the comparator receiving a back reflection voltage waveform from an input of the transmission line
Data Source
AI summary
Method and apparatus for detecting in impedance change in a transmission line, such as a line in a computer bus. A CMOS-compatible time domain reflectometer circuit comprising a comparator is embedded in one or more chips and connected to the transmission line. The circuit measures the impedance inhomogeneity pattern (IIP) of the transmission line prior to use, and then repeatedly measures the HP during operation of the transmission line to detect a change in IIP, without Interfering with data transfer through the transmission line. The present invention can detect and locate wire-tapping magnetic probing or snooping, and Trojan and cold boot attacks on interconnecting buses between computer chips or integrated circuits in a computer system, such as on external memory buses.