Deep Learning Accelerator Memory Power Mode Management
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Solution Overview
Problem
Integrated circuit devices used for Artificial Neural Networks (ANNs) face challenges in power management, leading to high energy consumption and extended computation times due to inefficient use of memory resources.
Innovation Solution
The implementation of a Deep Learning Accelerator (DLA) with random access memory that employs intelligent low power modes, where memory banks are dynamically switched to low power modes based on predicted usage patterns, reducing energy consumption without performance degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If memory banks operate continuously in normal mode to ensure fast data access for ANN computations, then computation speed is maintained, but energy consumption increases significantly
Solution Approach 1:
The memory bank operates in multiple dynamic modes (normal mode and low-power mode) that can be switched based on usage requirements. The system dynamically transitions between these modes to optimize the trade-off between energy consumption and data access speed, rather than operating in a fixed state.
Solution Approach 2:
The memory bank periodically switches between normal operation and low-power states based on predicted usage patterns. This periodic action allows the system to consume less energy during idle periods while maintaining fast access capability when data is needed, resolving the contradiction between continuous operation and energy savings.
2Use of energy by moving object
If memory banks are switched to low power mode to reduce energy consumption, then energy efficiency improves, but computation time increases due to mode transition delays
Solution Approach 1:
The system performs preliminary actions by predicting future data access patterns and pre-managing memory bank states accordingly. By anticipating when data will be needed, the system can transition memory banks out of low-power mode in advance, ensuring data is ready when required and avoiding computation delays.
Solution Approach 2:
The system uses feedback from data access patterns and usage statistics to continuously optimize the timing and duration of low-power mode transitions. This feedback mechanism allows the system to learn from actual usage and adjust its power management strategy to minimize both energy consumption and computation time.
3Use of energy by moving object
If CPU intervention is reduced for power savings, then energy consumption decreases, but memory management intelligence and adaptability are compromised
Solution Approach 1:
The memory management system operates autonomously without requiring continuous CPU intervention. It self-manages the transitions between normal and low-power modes based on its own monitoring of data access patterns, thereby reducing energy consumption while maintaining full adaptability through its built-in intelligence.
Solution Approach 2:
The system changes operational parameters (power mode, timing) based on observed usage patterns rather than CPU commands. This autonomous parameter adjustment allows the memory bank to adapt to different workloads and access patterns while consuming minimal energy, as the adaptation logic is embedded in the memory management hardware itself.
Data Source
AI summary
Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, an integrated circuit device may be configured to execute instructions with matrix operands and configured with random access memory that includes multiple memory groups having independent power modes. The random access memory is configured to store data representative of parameters of an Artificial Neural Network and representative of instructions executable by the Deep Learning Accelerator to perform matrix computation to generate an output of the Artificial Neural Network. During execution of the instructions, a power manager may adjust grouping of memory addresses mapped into the memory groups and adjust power modes of the memory groups to reduce power consumption and to avoid performance impact.