Disk-Locked Clock Jitter Reduction via SAM Averaging
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Solution Overview
Problem
Existing disk-locked clock (DLC) systems in magnetic data storage devices experience jitter due to variations in servo track signal amplitude and SAM position, leading to phase errors in locking the DLC to the rotational speed of the disk.
Innovation Solution
A system comprising a rotating magnetic storage media with adjacent servo address marks, a servo address mark detector, a counter, and a disk-locked clock synthesizer that calculates and averages differences in counter values to generate a phase error value, updating the system clock to minimize jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single servo address mark (SAM) is used to trigger sampling of the counter value, then the DLC can be locked to the rotational speed of the disk, but signal amplitude variation and SAM position differences induce jitter in the phase of the DLC
Solution Approach 1:
The patent combines multiple counter value samples (from multiple successive SAMs) into a single averaged value. Instead of relying on a single SAM trigger, the system collects counter values from multiple SAM events and computes their average, thereby merging multiple measurements to reduce the impact of individual variations in signal amplitude and SAM position, thus reducing jitter and improving phase stability
Solution Approach 2:
The patent implements a feedback mechanism where the averaged counter value is compared against a reference value, and the difference (error signal) is used to adjust the DLC phase. This closed-loop feedback continuously corrects phase deviations, maintaining stable locking despite variations in signal conditions
2Reliability
If multiple successive servo address marks are sampled and averaged, then jitter is reduced and phase stability improves, but the complexity of the DLC system increases
Solution Approach 1:
The patent applies partial averaging by sampling a limited number of successive SAMs (not all possible SAMs) and averaging their counter values. This partial action provides sufficient jitter reduction without requiring excessive processing, thereby balancing improved reliability with acceptable system complexity
Solution Approach 2:
The system performs preliminary sampling of multiple SAMs and computes their average in advance, before using the result for phase correction. This preliminary processing organizes the data in a way that simplifies the subsequent feedback operation, reducing the complexity of the overall system
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces jitter in the disk-locked clock by averaging counter value differences, providing a more stable phase lock to the rotational speed of the disk, thereby improving data read and write accuracy.
Implementation Method 1
a head for reading the media... The head is configured to read data and servo information stored on the media
Data Source
AI summary
Described embodiments provide a magnetic mass storage device with a system clock phase-locked to servo address marks on the magnetic disk. A head sequentially reads multiple adjacent servo address marks in a spiral track of servo address marks. When a servo address mark detector detects a mark, the count value of a counter driven by the system clock is sampled and held by a latch. A system clock synthesizer calculates differences in value between successively sampled count values from the latch, averages the differences in value to create an average difference value, and normalizes a difference between the average difference value and a target value to create a phase error value. The phase of the system clock is updated using the phase error value.