Delay-Locked Loop Bandwidth Tuning Across Operating Frequencies
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Solution Overview
Problem
Existing closed-loop clock circuits, such as delay-locked loops, face challenges in varying their bandwidth in response to changes in operating frequency, which affects jitter and acquisition time, making them less effective across a wide range of frequencies.
Innovation Solution
The solution involves varying the loop bandwidth of closed-loop clock circuits, specifically delay-locked loops, by adjusting the filter depth and type based on the operating frequency, which is determined through methods like reading a register value or using a frequency-to-voltage converter, to maintain optimal jitter and acquisition times across different frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If loop bandwidth is increased, then acquisition time is reduced, but jitter is increased
Solution Approach 1:
The patent applies dynamics by making the loop bandwidth adjustable rather than fixed. The system dynamically changes the loop bandwidth parameter based on operating conditions, allowing optimization between acquisition time and jitter performance for different frequency ranges and operational phases.
Solution Approach 2:
The patent implements parameter changes by modifying the loop bandwidth parameter. A register value is read to determine the operating frequency range, and based on this frequency information, the loop bandwidth parameter is adjusted to optimal values that balance acquisition time and jitter for the current operating conditions.
2Object-affected harmful factors
If loop bandwidth is decreased, then jitter is reduced, but acquisition time is increased
Solution Approach 1:
The system dynamically adjusts the loop bandwidth parameter based on the determined operating frequency range. During initial acquisition phases, a higher bandwidth is used for faster locking, while during steady-state operation, the bandwidth is reduced to minimize jitter, allowing the system to optimize both parameters at different times.
Solution Approach 2:
The patent changes the loop bandwidth parameter based on frequency information obtained from reading a register value. By adjusting this parameter according to the operating frequency range, the system achieves optimal performance characteristics for different operational conditions.
3Device complexity
If loop parameters are kept constant, then device complexity is reduced, but performance varies with frequency changes
Solution Approach 1:
The patent implements parameter changes by adjusting the loop bandwidth based on the operating frequency. A register value is read to determine the frequency range, and the loop bandwidth parameter is modified accordingly, allowing the system to maintain optimal performance across different frequency operations without requiring complex hardware modifications.
Solution Approach 2:
The system performs self-configuration by automatically determining the operating frequency range through register reading and autonomously adjusting the loop bandwidth parameter without external intervention. This self-service approach enables adaptive performance optimization while keeping the control mechanism relatively simple.
Data Source
AI summary
Circuits, methods, and apparatus that vary one or more attributes or parameters of a closed-loop clock circuit as a function of a characteristic of its operating frequency. One example provides a delay-locked loop having a loop bandwidth that can be varied as a function of its operating frequency. In this specific example, operating frequency is determined. This determination may be made directly, either by measuring operating frequency, or indirectly, by taking a measurement or reading, such as by reading a value for column address select latency. Once the operating frequency is determined, the loop bandwidth can be set. In one example, the loop bandwidth is set by adjusting the depth of the delay-locked loop's loop filter.