DLL Clock Phase Shifting for EMI-Safe Semiconductor Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-frequency system clocks in semiconductor memory devices cause electromagnetic interference (EMI), leading to malfunctions due to the fixed frequency of the delay locked loop (DLL) clock, which is not effectively suppressed by conventional methods.
Innovation Solution
The DLL circuit in the semiconductor memory device dynamically changes the phase of the DLL clock when EMI is detected, ensuring the frequency band remains within a delay locking range, preventing the clock from having a single fixed frequency and thus reducing EMI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the DLL circuit uses a fixed frequency clock to ensure precise data output timing, then data synchronization is improved, but electromagnetic interference (EMI) increases causing malfunctions
Solution Approach 1:
The patent applies dynamics by making the DLL clock frequency adjustable rather than fixed. The system dynamically changes the DLL clock frequency based on detection of electromagnetic interference conditions, allowing it to adapt between maintaining precise timing and reducing EMI. This is achieved through a control mechanism that modifies the clock frequency in response to system conditions.
Solution Approach 2:
The patent changes the frequency parameter of the DLL clock to resolve the contradiction. By varying the clock frequency away from fixed values, the system reduces electromagnetic interference while still maintaining adequate timing precision for data output. This parameter adjustment allows the system to operate in different frequency ranges to balance precision and EMI reduction.
2Productivity
If the system increases operating speed to meet high-speed data requirements, then productivity is improved, but electromagnetic interference increases causing element malfunctions
Solution Approach 1:
The system dynamically adjusts the DLL clock frequency based on operating conditions. When high-speed operation is required, the system can increase productivity while monitoring for EMI conditions and adjusting the clock frequency accordingly to prevent malfunctions, creating a dynamic balance between speed and stability.
Solution Approach 2:
The patent employs feedback mechanisms to detect electromagnetic interference conditions and adjust the DLL clock frequency in response. This feedback loop allows the system to maintain high productivity while automatically reducing clock frequency when EMI is detected, preventing element malfunctions while preserving overall system performance.
Data Source
AI summary
A semiconductor memory device has a DLL circuit capable of suppressing EMI without distorting a DLL clock required in high-speed operation. The semiconductor memory device includes a delay locked loop (DLL) circuit configured to be responsive to a system clock to output a DLL clock having a phase that is changed when electromagnetic interference (EMI) is detected, for the DLL clock to have frequencies within a delay locking range, and a data output circuit configured to output data in synchronization with the DLL clock.


