Delay-Locked Loop Clock Inversion for Temperature-Stable Phase Locking
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Solution Overview
Problem
In delay locked loops of electronic devices, drastic ambient temperature changes can prevent phase locking and cause stuck locking, even when a delay line provides a minimum delay amount.
Innovation Solution
A delay locked loop comprising a delay line, phase detector, controller, output clock generator, and feedback circuit, which detects phase differences and adjusts the delay line's output by selecting the inverted delayed clock signal when the feedback clock lags, ensuring phase locking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the delay line provides a minimum delay amount, then the delay locked loop should achieve phase locking, but stuck locking occurs when ambient temperature changes drastically
Solution Approach 1:
The patent applies inversion by introducing an inverter that can invert the delayed clock signal. When the feedback clock phase lags too much behind the reference clock phase (beyond the可调 delay range), the system inverts the delayed clock signal to generate the feedback clock, effectively reversing the phase relationship to achieve locking. This resolves the contradiction by providing an alternative phase adjustment mechanism when minimum delay is insufficient for temperature compensation.
Solution Approach 2:
The patent implements dynamics by making the feedback clock generation dynamic - switching between using the delayed clock signal directly and using the inverted delayed clock signal based on phase comparison results. The controller dynamically selects which path to use, allowing the system to adapt to varying temperature conditions and maintain phase locking across a wider temperature range.
2Device complexity
If the delay line provides minimum delay, then circuit complexity should be low, but phase locking cannot be achieved under drastic temperature changes
Solution Approach 1:
The patent introduces an inverter as an intermediary component between the delay line and the feedback path. This simple intermediary element enables the system to achieve additional phase adjustment capability without significantly increasing delay line complexity. The inverter acts as a mediator that allows the minimal delay line to effectively cover a broader phase adjustment range by inverting the signal when needed.
Solution Approach 2:
The patent changes the phase parameter of the feedback clock by introducing an inversion operation. When phase locking cannot be achieved with the minimum delay configuration, the system changes the phase parameter by 180 degrees through inversion, allowing the feedback clock to catch up with the reference clock phase and achieve locking under drastic temperature changes.
Data Source
AI summary
A delay locked loop includes a delay line, a phase detector, a controller, an output clock generator, and a feedback circuit. The delay line receives an input clock signal and a control code, and generates a delayed clock signal by delaying the input clock signal according to the control code. The phase detector receives a reference clock signal and a feedback clock signal, and detects a phase difference between the reference clock signal and the feedback clock signal to generate phase comparison information. The controller generates the control code and a switching signal according to the phase comparison information. The output clock generator selects the delayed clock signal or an inverted signal of the delayed clock signal according to the switching signal to generate an output clock signal. The feedback circuit generates the feedback clock signal according to the output clock signal.