DLL Clock Generation with Intermittent Counter Start-Up Control

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Solution Overview

Problem

Existing DLL circuit systems in semiconductor memory devices, such as DDR-SDRAM, require a constant counter circuit operation during the start-up period, leading to increased power consumption and potential malfunctions due to hazards caused by delayed state transitions during power-down modes.

Innovation Solution

A DLL circuit unit comprising a counter circuit that intermittently operates the DLL circuit by generating a first clock signal and supplying a control signal to inactivate the internal clock during the start-up period, reducing power consumption and preventing hazards by synchronizing clock activation and inactivation with the DLL circuit's state transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the counter circuit operates constantly to control the DLL circuit during start-up period, then the DLL circuit can be properly controlled during state transitions, but power consumption increases

Engineering Contradiction:
ImproveDLL circuit state transition controlVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The counter circuit operates periodically rather than continuously. It is activated only during the start-up period when the DLL circuit needs control, and inactivated during normal operation and power-down modes. This periodic operation reduces power consumption while maintaining necessary control functionality during critical state transitions.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system dynamically adjusts the operational state of the counter circuit based on the DLL circuit's state. The counter circuit transitions between active and inactive states according to the start-up period and power-down mode, optimizing power consumption while ensuring proper control during state transitions.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If the counter circuit is inactivated during power-down mode, then power consumption is reduced, but hazards may occur due to delayed state transitions

Engineering Contradiction:
Improvepower consumptionVSAvoidstate transition synchronization
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The counter circuit is activated in advance during the start-up period before the DLL circuit enters power-down mode. This preliminary activation ensures that the counter is ready and synchronized before any state transitions occur, preventing hazards while allowing power savings during the actual power-down mode when the DLL is already stable.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback mechanisms to monitor the DLL circuit's state and control the counter circuit's activation accordingly. The counter circuit is activated based on detection of the start-up period and deactivated when the DLL enters power-down mode, ensuring proper synchronization without continuous operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8493110B2Device including a clock generation circuit and a method of generating a clock signal
Publication Date: 2013.07.23 LONGITUDE LICENSING LTD
  • US8493110B2 patent drawing
  • US8493110B2 patent drawing
  • US8493110B2 patent drawing

AI summary

A device in which a clock generation circuit is connected to a counter circuit for controlling operation timing of a DLL circuit or the like, and the counter circuit is intermittently operated by intermittently supplying a clock signal to the counter circuit from the clock generation circuit.