DLL Start-Up Timing Using Intermittent Counter Clocking
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Solution Overview
Problem
Existing DLL circuit systems in semiconductor memory devices, such as DDR-SDRAM, require a constant counter circuit operation during the start-up period, leading to inefficiencies in power saving.
Innovation Solution
A device comprising a DLL circuit, a clock generation circuit, and a counter circuit that intermittently operates the DLL circuit by generating and controlling clock signals to inactive the internal clock during the start-up period, reducing power consumption by only activating the counter circuit during this period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the counter circuit operates constantly to control the DLL circuit, then the DLL circuit can be properly controlled during the start-up period, but power consumption increases
Solution Approach 1:
The counter circuit operates periodically rather than continuously. It is activated only during the start-up period when the DLL circuit requires control, and then inactivated during normal operation. This periodic operation pattern reduces power consumption while maintaining necessary control functionality during critical periods.
Solution Approach 2:
The counter circuit performs its control function in advance during the start-up period before the DLL circuit begins normal operation. By completing the necessary control actions during the initial phase, the counter can be deactivated afterward, reducing overall power consumption while ensuring the DLL is properly initialized.
2Use of energy by moving object
If the counter circuit is inactivated after the start-up period, then power saving is achieved, but the start-up period timing control becomes critical
Solution Approach 1:
The system uses feedback mechanisms to monitor the DLL circuit's operation state and determine when the start-up period has elapsed. This feedback ensures that the counter circuit is deactivated at the appropriate time, maintaining precise timing control while enabling power saving during normal operation.
Solution Approach 2:
The counter circuit's operational state is dynamically adjusted based on the DLL circuit's needs. It transitions from an active state during the start-up period to an inactive state during normal operation, with the transition timing precisely controlled to ensure proper DLL initialization while maximizing power savings.
Data Source
AI summary
A device in which a clock generation circuit is connected to a counter circuit for controlling operation timing of a DLL circuit or the like, and the counter circuit is intermittently operated by intermittently supplying a clock signal to the counter circuit from the clock generation circuit.


