DLL Lock Control During Auto-Refresh in Semiconductor Memory

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Solution Overview

Problem

Synchronous semiconductor memory devices face errors due to reduced data valid windows when operating at high frequencies, and existing DLL circuits struggle to maintain a locked state during auto-refresh operations, leading to power consumption issues and noise generation.

Innovation Solution

A semiconductor memory device with a control unit that manages a delay-locked loop circuit to maintain a locked state by performing logical AND operations on auto-refresh request and end signals, ensuring the locked state is maintained during the updating period of the auto-refresh operation, thereby reducing power consumption and enlarging the data valid window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the DLL circuit performs locking operation continuously during auto-refresh, then the locked state is maintained, but power consumption increases

Engineering Contradiction:
Improvelocked state maintenanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The DLL circuit performs locking operation periodically rather than continuously. The control unit generates a locking operation control signal only during specific periods (when auto-refresh is not performed), allowing the DLL to maintain its locked state without continuous active locking, thus reducing power consumption while preserving reliability

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The DLL circuit performs locking operation in advance before the auto-refresh period begins. By completing the locking operation before noise generation starts, the system ensures the locked state is established and can be maintained passively during auto-refresh, avoiding the need for continuous active locking

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the DLL circuit stops locking operation during auto-refresh, then power consumption is reduced, but the locked state cannot be maintained

Engineering Contradiction:
Improvepower consumptionVSAvoidlocked state maintenance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The locking operation is performed in advance before the auto-refresh period begins. The control unit detects the start of auto-refresh and ensures the DLL has completed locking beforehand, so the locked state is already established and can be maintained passively during the high-power auto-refresh period

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system prepares the DLL locking state in advance to cushion against the potential disruption caused by auto-refresh. By having the locked state established before auto-refresh begins, the system creates a buffer that protects the locking stability during the noisy auto-refresh period

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Speed

If synchronous memory device operates at high frequency, then operating speed is enhanced, but data valid window is reduced causing errors

Engineering Contradiction:
Improveoperating speedVSAvoiddata synchronization accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The DLL circuit dynamically adjusts the phase of the internal clock signal to compensate for delays in the memory device. By continuously or periodically adjusting the clock phase based on feedback, the system maintains accurate data synchronization even at high operating frequencies where fixed timing would fail

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The DLL circuit uses feedback from the actual signal delays in the memory device to adjust the clock signal timing. The phase detector compares the external clock with the internal clock and adjusts the delay elements to achieve precise synchronization, ensuring data validity windows are properly aligned even at high speeds

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8184495B2Semiconductor memory device for controlling operation of delay-locked loop circuit
Publication Date: 2012.05.22 SAMSUNG ELECTRONICS CO LTD
  • US8184495B2 patent drawing
  • US8184495B2 patent drawing
  • US8184495B2 patent drawing

AI summary

A semiconductor memory device for controlling an operation of a delay-locked loop (DLL) circuit includes a DLL circuit that receives an external clock signal and that performs a locking operation on the external clock signal and an internal clock signal, thereby obtaining a locked state. A control unit controls the DLL circuit to constantly maintain the locked state during an updating period of an auto-refresh period of an auto-refresh operation for refreshing memory banks.