DLL Coarse Lock Detector With Even-Odd Sampling Margin
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Solution Overview
Problem
Conventional coarse lock detectors for delayed locked loops (DLLs) face issues with stuck and harmonic lock problems, particularly at high speeds due to inadequate sampling of multiphase clocks, leading to instability and failure in achieving phase locking.
Innovation Solution
The proposed coarse lock detector divides frequency detection cells into even and odd groups, allowing for even/odd sampling of multiphase clocks, which increases the timing margin and prevents stuck problems by ensuring that the delay time is less than twice the interval between multiphase clocks, thereby enabling stable operation at high speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional coarse lock detector samples multiphase clocks at high speed, then operating speed is improved, but stuck problems and harmonic lock occur due to inadequate timing margin
Solution Approach 1:
The detection cells are divided into two groups: even-numbered detection cells and odd-numbered detection cells. Each group samples multiphase clocks at different time intervals, effectively segmenting the sampling process to increase timing margin and prevent stuck problems while maintaining high operating speed
Solution Approach 2:
The even-numbered and odd-numbered detection cells perform sampling in alternating periodic intervals. The even cells sample during one period while odd cells sample during the next period, creating a periodic action pattern that ensures adequate timing margin at high speeds
Data Source
AI summary
A coarse lock detector for a delayed locked loop (DLL) is disclosed. The coarse lock detector includes multiple detection cells. Each detection cell receives a delayed clock phase and an output of a previous detection cell as inputs. To increase time for the output of the previous detection cell to propagate, the detection cells are arranged in groups such that the output from the previous detection cell is generated by a detection cell which is more than one detection cell previous.


