DLL Oscillation Filtering for Faster Clock Lock Stability

Solution Overview

Problem

Conventional Delay Locked Loops (DLLs) in memory devices suffer from oscillations caused by external clock jitter, phase detection circuit noise, and process-voltage-temperature variations, leading to increased power consumption and prolonged lock establishment times.

Innovation Solution

The implementation of a high-speed, low-power DLL with an integrated filter that detects and cancels oscillations in the delay line control signals, using a combination of oscillation filters and a majority filter to stabilize the DLL circuit and reduce unnecessary power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional DLL is used to synchronize internal clock with external clock, then clock synchronization is achieved, but oscillation occurs causing extended lock establishment time and increased power consumption

Engineering Contradiction:

Improveclock synchronization stabilityVSAvoidlock establishment time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by detecting oscillations in the delay line control signals before they fully develop and taking corrective action. The oscillation detection circuit monitors control signals for oscillatory patterns and preemptively adjusts the delay line control to prevent extended lock establishment time, addressing the issue before it fully manifests.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through an oscillation detection circuit that continuously monitors delay line control signals and feeds back oscillation information to adjust the DLL operation. This closed-loop feedback mechanism detects oscillatory patterns and modifies control signals to suppress oscillations, thereby reducing lock establishment time while maintaining synchronization stability.

Inventive Principle:

Principle #23Feedback

2Reliability

If conventional DLL tracks oscillating external clock signal, then clock synchronization is maintained, but unnecessary power is consumed due to extra delay line shifts

Engineering Contradiction:

Improveclock synchronizationVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by detecting oscillations in the delay line control signals before they fully develop and taking corrective action. The oscillation detection circuit monitors control signals for oscillatory patterns and preemptively adjusts the delay line control to prevent extended lock establishment time, addressing the issue before it fully manifests.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through an oscillation detection circuit that continuously monitors delay line control signals and feeds back oscillation information to adjust the DLL operation. This closed-loop feedback mechanism detects oscillatory patterns and modifies control signals to suppress oscillations, thereby reducing lock establishment time while maintaining synchronization stability.

Inventive Principle:

Principle #23Feedback

3Reliability

If DLL delay line is adjusted to track oscillating clock signal, then synchronization is maintained, but lock establishment time is extended

Engineering Contradiction:

Improveclock synchronizationVSAvoidlock establishment duration

Core Design Contradiction:

ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by detecting oscillations in the delay line control signals before they fully develop and taking corrective action. The oscillation detection circuit monitors control signals for oscillatory patterns and preemptively adjusts the delay line control to prevent extended lock establishment time, addressing the issue before it fully manifests.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through an oscillation detection circuit that continuously monitors delay line control signals and feeds back oscillation information to adjust the DLL operation. This closed-loop feedback mechanism detects oscillatory patterns and modifies control signals to suppress oscillations, thereby reducing lock establishment time while maintaining synchronization stability.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS7596052B2Method and apparatus for reducing oscillation in synchronous circuits

Publication Date: 2009.09.29 MICRON TECHNOLOGY INC

AI summary

Control signal oscillation filtering circuits, delay-locked loops, clock synchronization methods and devices and system incorporating control signal oscillation filtering circuits is described. An oscillation filtering circuit includes a first oscillation filter configured to filter oscillations and a majority filter configured to average filter an output of a phase detector and generate in response thereto control signals to an adjustable delay line.