Programmable DLL Phase Compensation with Coarse-Fine Locking
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Solution Overview
Problem
Traditional digital DLL designs for memory subsystems face challenges in phase compensation, including harmonic lock issues and inflexibility under noisy conditions, due to binary search mechanisms and complex state machine controllers, which affect signal quality and locking precision.
Innovation Solution
A phase compensation circuit with a programmable slope is introduced, allowing for variable phase adjustments that dynamically change based on environmental conditions, employing a parallel phase compensation system with coarse and fine locks, and a simple linear state machine to generate triangular control features, enabling faster locking and improved precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If finer phase adjustments are used in DLL, then locking precision and signal quality are improved, but the DLL cannot lock within specification timing requirements and may fail to catch up under noisy conditions
Solution Approach 1:
The patent implements a dual-mode phase adjustment mechanism that dynamically switches between fine adjustment mode (for precision locking) and coarse adjustment mode (for fast acquisition). The controller selects the adjustment granularity based on the current locking state, allowing the system to achieve both fast initial lock and precise final alignment, resolving the contradiction between locking speed and precision.
2Measurement precision
If binary search based on shift register design is used, then phase lock position can be determined, but harmonic lock occurs and system complexity increases
Solution Approach 1:
The patent extracts the phase adjustment function from a complex shift register-based state machine and implements it using a simplified counter and decoder architecture. The counter generates phase adjustment values that are decoded to control delay elements, eliminating the need for complex binary search logic and state machine controllers, thus reducing system complexity while maintaining lock position determination capability.
Solution Approach 2:
The patent replaces the mechanical-like binary search process with a direct computational approach using a counter and decoder. Instead of iteratively searching through phase positions using complex control logic, the system directly computes and applies the required phase adjustment, substituting a simpler computational mechanism for the complex control system.
3Loss of time
If coarser phase adjustments are used, then DLL can lock within specification timing requirements, but signal quality deteriorates and tracking precision is lost
Solution Approach 1:
The patent implements a dual-mode phase adjustment mechanism that dynamically switches between fine adjustment mode (for precision locking) and coarse adjustment mode (for fast acquisition). The controller selects the adjustment granularity based on the current locking state, allowing the system to achieve both fast initial lock and precise final alignment, resolving the contradiction between locking speed and precision.
Data Source
AI summary
Phase compensation in an I/O (input/output) circuit includes variable, programmable slope. A phase compensation circuit can apply phase compensation of one slope and dynamically change the slope of the phase compensation to allow for better tracking of environmental conditions. The phase compensation circuit can generate a linear code to apply phase compensation to lock phase of an I/O signal to a phase of a timing signal. The circuit selectively adjusts the linear code with a variable, programmable slope, where the slope defines how much phase compensation is applied per unit change in the linear code. The circuit applies the adjusted linear code to a lock loop to lock the phase of the I/O signal to the phase of the timing signal.