Delay-Lock Loop Offset Compensation via Phase Difference Feedback

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Solution Overview

Problem

Existing DLL systems are inadequate for high-speed operations, particularly in compensating for offset errors among delay lines, leading to inaccurate clock signals and increased circuit complexity.

Innovation Solution

A delay-lock loop system that determines a system offset based on phase differences among delay lines, using a phase detector, charge pump, voltage regulator, and correction module to provide phase corrections through a feedback loop, allowing for efficient offset compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional DLL systems are used for high-speed operations, then clock signal generation is achieved, but offset errors among delay lines cause inaccurate clock signals

Engineering Contradiction:
Improveclock signal accuracyVSAvoidoffset error compensation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the phase detector continuously monitors the phase difference between the reference clock signal and feedback clock signal, and adjusts the delay lines accordingly through the charge pump and voltage regulator. This closed-loop feedback system automatically compensates for offset errors among delay lines, ensuring accurate clock signal generation even at high speeds.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces traditional mechanical or manual offset compensation methods with an electronic feedback control system. Instead of physically adjusting delay line components, the system uses electronic signals (up signal and down signal from phase detector) to control charge pump current, which dynamically adjusts delay line phases through voltage regulation, achieving more precise and reliable offset compensation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If multiple individual compensation mechanisms are implemented for each delay line, then offset errors are compensated, but circuit complexity increases

Engineering Contradiction:
Improveoffset error compensationVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges all individual delay line compensation mechanisms into a single unified feedback control system. Instead of having separate compensation circuits for each delay line, the system uses one phase detector, one charge pump, and one voltage regulator to collectively control all delay lines. This consolidation maintains effective offset compensation while significantly reducing circuit complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The voltage regulator in the patent serves multiple functions: it receives the reference voltage from the charge pump, generates the drive voltage for all delay lines, and provides feedback to the phase detector. This multi-functional component eliminates the need for multiple dedicated compensation circuits, achieving both offset error compensation and reduced circuit complexity through universal design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9041445B1Feedback for delay lock loop
Publication Date: 2015.05.26 MARVELL ASIA PTE LTD
  • US9041445B1 patent drawing
  • US9041445B1 patent drawing
  • US9041445B1 patent drawing

AI summary

The present invention is directed to signal processing system and electrical circuits. More specifically, embodiments of the present invention provide a DLL system that provides phase correction by determining a system offset based on phase differences among the delay lines. The offset is used as a part of a feedback loop to provide phase corrections for the delay lines. There are other embodiments as well.