Multi-Stage DLL Phase Detector With Exponential Phase Scaling
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Solution Overview
Problem
Conventional delay-locked loops (DLLs) often require a large number of flip-flops to achieve high resolution phase locking, leading to increased area and power dissipation, and can experience false locking issues due to the use of a large number of delay elements.
Innovation Solution
A phase detector circuit with a phase propagator and phase controller that uses a reduced number of flip-flops by scaling clock phases exponentially, avoiding false locking and reducing the number of delay elements needed, with the phase controller passing multiple phases that differ exponentially, such as 1, 2, 4, 8, 16, etc., to achieve phase lock without the need for a large number of flip-flops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of flip-flops are used in conventional DLLs to achieve high resolution phase locking, then phase locking resolution is improved, but area and power dissipation increase
Solution Approach 1:
The patent changes the phase distribution parameter from uniform to exponential scaling. Instead of using equally spaced phases (0, 1, 2, 3, 4, 5), the system uses exponentially scaled phases (0, 1, 2, 4, 8, 16) where each phase is scaled by a factor of 2 relative to the previous one. This parameter change allows achieving the same phase locking resolution with fewer flip-flops, thereby reducing area while maintaining measurement precision.
2Measurement precision
If a large number of delay elements are used in conventional DLLs to achieve high resolution phase locking, then phase locking resolution is improved, but false locking issues occur
Solution Approach 1:
The patent applies exponential scaling to the phase indices of delay elements, transforming the uniform sequence (0, 1, 2, 3, 4, 5) into an exponential sequence (0, 1, 2, 4, 8, 16). This parameter transformation ensures that the phase detector can uniquely identify the correct lock point by detecting when the exponentially scaled phase indices wrap around, thereby eliminating false locking while maintaining high resolution.
3Measurement precision
If a large number of delay elements are used in conventional DLLs to achieve high resolution phase locking, then phase locking resolution is improved, but power dissipation increases
Solution Approach 1:
By changing the phase distribution from uniform to exponential scaling, the patent reduces the total number of delay elements required. Since each delay element consumes power, reducing their数量 directly reduces power dissipation while maintaining the same phase locking resolution through the exponential relationship between phases.
4Area of stationary object
If a reduced number of flip-flops is used with exponential phase scaling, then area is reduced, but device complexity increases due to non-linear phase scaling
Solution Approach 1:
The patent introduces a feedback mechanism where the phase detector monitors the output of the exponentially scaled delay elements and generates control signals to adjust the delay element settings. This feedback loop automatically compensates for the non-linear phase scaling, making the system behave linearly from the user perspective while maintaining the area benefits of exponential scaling.
Data Source
AI summary
A phase detector includes a phase propagator circuit including a plurality of flip-flops. Each flip-flop includes a clock input configured to receive a clock signal having a different phase relative to phases of the clock signal received by other flip-flops in the plurality of flip-flops. The phase detector further includes a phase controller coupled to the clock input of each flip-flop in the plurality of flip-flops. The phase controller is configured to provide the different phases of the clock signal to the plurality of flip-flops such that the different phases are scaled exponentially relative to one another.