DLL Clock Phase Shifting for EMI-Stable High-Speed Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed semiconductor memory devices experience malfunctions due to electromagnetic interference (EMI) caused by high-frequency system clocks, which can lead to data synchronization issues and device malfunction.
Innovation Solution
A semiconductor memory device with a delay locked loop (DLL) circuit that detects EMI and changes the phase of the DLL clock within a delay locking range, preventing the clock from having a fixed frequency and thus reducing EMI by implementing a spread spectrum technique.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the system clock frequency is increased to achieve high-speed data input/output, then the data input/output speed is improved, but electromagnetic interference (EMI) is generated causing device malfunction
Solution Approach 1:
The patent applies dynamics by making the DLL clock frequency variable rather than fixed. The EMI detection unit monitors for interference, and when EMI is detected, the control unit dynamically adjusts the DLL clock frequency within the delay locking range to a different frequency, thereby eliminating the harmful EMI while maintaining high-speed operation
Solution Approach 2:
The patent changes the frequency parameter of the DLL clock signal. By detecting EMI and subsequently adjusting the clock frequency to a different value within the acceptable delay locking range, the system modifies the operating parameter to eliminate electromagnetic interference while preserving the high-speed data input/output capability
2Object-generated harmful factors
If the DLL clock frequency is adjusted to eliminate EMI, then electromagnetic interference is reduced, but data synchronization may be affected
Solution Approach 1:
The patent implements feedback through the EMI detection unit that continuously monitors the system for electromagnetic interference. When EMI is detected, this feedback triggers the control unit to adjust the DLL clock frequency. The feedback mechanism ensures that frequency adjustments are made only when necessary, maintaining data synchronization reliability while eliminating EMI
Solution Approach 2:
The system performs self-service by automatically detecting EMI and adjusting its own DLL clock frequency without external intervention. The EMI detection unit and control unit work together to autonomously maintain optimal operating conditions, ensuring both EMI reduction and data synchronization reliability
Data Source
AI summary
A semiconductor memory device has a DLL circuit capable of suppressing EMI without distorting a DLL clock required in high-speed operation. The semiconductor memory device includes a delay locked loop (DLL) circuit configured to be responsive to a system clock to output a DLL clock having a phase that is changed when electromagnetic interference (EMI) is detected, for the DLL clock to have frequencies within a delay locking range, and a data output circuit configured to output data in synchronization with the DLL clock.