DLL Power Modulation for Long-Period Clock Signal Locking

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Solution Overview

Problem

Delay lock loop (DLL) circuits face challenges in locking clock signals with longer periods, as they may require all delay elements to be active, leading to a loss of lock and inability to maintain output signals within specified parameters.

Innovation Solution

The DLL modulates the power supply to delay elements and adjusts the coarse/fine delay ratio to accommodate a wide range of clock frequencies, allowing the DLL to lock clock signals with longer periods by increasing the delay imparted by each element, thereby ensuring the output signal remains within specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If all delay elements are activated to handle longer clock periods, then the DLL can accommodate longer periods, but the DLL loses lock and cannot maintain output signals within specifications

Engineering Contradiction:
Improveclock period rangeVSAvoidlock stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic power adjustment by modulating the power supply voltage to delay elements based on detected clock period length. When a long clock period is detected, the system increases power to specific delay elements to increase their delay contribution, allowing the DLL to maintain lock with fewer elements active. This dynamic adaptation resolves the contradiction by enabling the system to handle variable clock periods while maintaining stable lock through controlled power distribution to delay elements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the power supply parameter (voltage) to delay elements based on the detected clock period. By adjusting the power level, the delay characteristics of individual delay elements are modified to match the required total delay for the current clock period. This parameter change enables the DLL to accommodate longer periods without requiring all elements to be fully active, thereby maintaining lock stability while expanding adaptability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the DLL uses all delay elements to lock long period clock signals, then it can lock the signal, but it cannot maintain output signals within specified parameters

Engineering Contradiction:
Improvesignal locking capabilityVSAvoidoutput signal parameter specification
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by selectively adjusting the power supply to specific delay elements rather than uniformly activating all elements. When a long clock period is detected, the system identifies which delay elements need enhanced delay contribution and applies increased power only to those elements. This localized power adjustment allows the DLL to achieve the required total delay while maintaining precise control over individual element contributions, ensuring output signals remain within specifications.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system applies partial action by not requiring all delay elements to operate at full capacity. Instead, it selectively activates and enhances only the necessary subset of delay elements based on the detected clock period. This partial activation approach allows the DLL to lock long period signals while avoiding the precision degradation that would result from over-utilizing all delay elements simultaneously.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If the DLL operates with a wide clock frequency range, then it can accommodate different periods, but it requires complex power management to maintain performance

Engineering Contradiction:
Improveclock frequency rangeVSAvoidpower supply control circuitry
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements feedback by continuously monitoring the incoming clock period length and using this information to dynamically adjust the power supply to delay elements. The system detects whether the clock period is long or short and automatically modifies the power distribution accordingly. This feedback mechanism simplifies power management complexity by providing automated, adaptive control that eliminates the need for complex manual configuration or multiple dedicated power circuits for different frequency ranges.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The power supply control circuitry is designed with multi-functionality to handle both short and long clock periods using the same hardware infrastructure. By implementing a universal power adjustment mechanism that can dynamically scale power to delay elements based on detected conditions, the system achieves wide frequency range adaptability without requiring separate dedicated circuits for different operating modes, thereby reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7737741B2Periodic signal delay apparatus, systems, and methods
Publication Date: 2010.06.15 MICRON TECHNOLOGY INC
  • US7737741B2 patent drawing
  • US7737741B2 patent drawing
  • US7737741B2 patent drawing

AI summary

Apparatus, systems, and methods are disclosed that operate to delay a periodic input signal in one or more delay elements of a group of delay elements to generate a periodic output signal and to vary a power supply to the delay elements. Additional apparatus, systems, and methods are disclosed.