DLL Delay Control Using Supply Modulation for Long-Period Clocks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Delay lock loop (DLL) circuits face challenges in locking clock signals with longer periods, as they may require all delay elements to be active, leading to a loss of lock and inability to maintain output signals within specified parameters.

Innovation Solution

The DLL modulates the power supply to delay elements and adjusts the coarse/fine delay ratio to accommodate a wide range of clock frequencies, allowing the DLL to lock clock signals with longer periods by increasing the delay imparted by each element, thereby ensuring the output signal remains within specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the DLL uses all delay elements to lock clock signals with longer periods, then the locking capability is improved, but the reliability deteriorates due to loss of lock and inability to maintain output signals within specifications

Engineering Contradiction:
Improvelocking capability for longer period clock signalsVSAvoidmaintainability of output signals within specifications
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies dynamics by making the delay element configuration adjustable and reconfigurable. The DLL can dynamically switch between different delay element configurations (first configuration with more delay elements for shorter periods, second configuration with fewer delay elements for longer periods) based on the input clock signal characteristics, allowing the system to adapt while maintaining reliability in each operating range

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of delay element configuration (which delay elements are active and their arrangement) to accommodate different clock signal periods. By switching between different configurations of delay elements, the system can maintain proper locking and output signal specifications across a wide range of clock periods without requiring all delay elements to be active simultaneously

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the DLL accommodates a wide range of clock frequencies, then the adaptability is improved, but the device complexity increases due to multiple delay element configurations

Engineering Contradiction:
Improveoperational range for clock frequenciesVSAvoidnumber of delay element configurations
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the delay elements into different groups or configurations that can be selectively activated. Instead of using all delay elements for all frequency ranges, the system divides them into first and second configurations, activating only the appropriate segment for each clock period range, thereby managing complexity while maintaining wide adaptability

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8138809B2Periodic signal delay apparatus, systems, and methods
Publication Date: 2012.03.20 MICRON TECHNOLOGY INC
  • US8138809B2 patent drawing
  • US8138809B2 patent drawing
  • US8138809B2 patent drawing

AI summary

Apparatus, systems, and methods are disclosed that operate to delay a periodic input signal in one or more delay elements of a group of delay elements to generate a periodic output signal and to vary a power supply to the delay elements. Additional apparatus, systems, and methods are disclosed.