DLVR Logic Domain Voltage Control for Dropout Transients
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Solution Overview
Problem
Modern systems on a chip (SOCs) face challenges in dynamic voltage and frequency scaling (DVFS) due to inadequate DLVR performance, particularly in high and fast current transients, leading to transient response issues, increased power consumption, and complex post-Si validation processes.
Innovation Solution
Implementing a linear-only-control-based DLVR architecture with pre-calculated CPS steps, dynamic shaping of the DLVR transfer function, and bidirectional mode transitions between regulated and bypass modes to optimize voltage delivery and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a more complex CPS architecture is implemented to handle high and fast current transients, then transient response is improved, but loop delay increases due to multi-cycle computation
Solution Approach 1:
The patent pre-calculates CPS steps and stores them in lookup tables before runtime. During operation, the pre-calculated values are directly retrieved and applied, eliminating the need for complex multi-cycle computations while maintaining accurate transient response control.
Solution Approach 2:
The patent divides the CPS computation into discrete pre-calculated steps that can be independently stored and retrieved. This segmentation allows the complex control function to be broken down into manageable lookup table entries, each representing a specific transient condition and its optimal response.
2Use of energy by moving object
If the DLVR operates with minimal dropout voltage to improve power efficiency, then power consumption is reduced, but gain drops leading to degraded transient response and higher DC positioning error
Solution Approach 1:
The patent dynamically adjusts the DLVR transfer function parameters based on the dropout voltage condition. When dropout is minimal, the transfer function is modified to compensate for the reduced gain, maintaining transient response performance while operating at low power consumption levels.
Solution Approach 2:
The patent implements bidirectional mode transitions between regulated and bypass modes based on real-time dropout voltage conditions. The system dynamically switches between operational modes to optimize the balance between power efficiency and transient response performance.
3Measurement precision
If DC positioning error is reduced to improve voltage accuracy, then a smaller guard band is required, but this increases the risk of undetected validation issues
Solution Approach 1:
The patent applies a reduced guard band based on the actual measured DC positioning accuracy rather than using a conservative fixed value. This partial action approach uses only the necessary validation margin, improving power efficiency while maintaining adequate validation coverage through targeted testing of critical voltage regions.
Data Source
AI summary
A supply voltage may be set using a local voltage regulator, such as a Digital Linear Voltage Regulators (DLVR). A DLVR may include a compensator, and the performance of the compensator may be affected by a dropout (DO) voltage. To improve the performance of a compensator, a number of compensator calculations may be pre-calculated to reduce the complexity of remaining real-time computations and enable compensator calculations to be completed within a single DLVR clock cycle. A DLVR may include a sense filter, and the DLVR transfer function (TF) may be modified using dynamic shaping of open loop gain and pole locations of a sense filter. The DO range associated with the DLVR TF may be changed according to a monitored DO(t) to reduce the sensitivity of a domain VMIN on dropout, which reduces power consumption, increases performance, and enables simplification of test flows.