DMA Access Control Circuitry for Peripheral Memory Safety

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Solution Overview

Problem

Current microcontroller designs face safety concerns due to potential erroneous operations and unauthorized access to peripherals, which can lead to unexpected I/O disruptions, particularly from random soft errors, despite existing protection mechanisms.

Innovation Solution

The implementation of an access control circuitry that manages direct memory access by checking for pending requests and verifying master IDs to ensure authorized access, thereby restricting access to peripherals only when necessary and revoking rights upon completion of DMA transfers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple protection layers (MPU, MMU, Master ID protection) are implemented to prevent unauthorized access, then security against intentional attacks is improved, but protection against random soft errors affecting I/O remains insufficient

Engineering Contradiction:
Improveprotection against random soft errorsVSAvoidprotection mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by checking whether a peripheral has a pending DMA request before allowing master access to the peripheral memory. The access control circuitry is configured to grant access only when the peripheral has an active DMA request, and to revoke access when the request is completed. This proactive control mechanism ensures that even if random soft errors occur, they can only affect I/O during the limited time window when a DMA transfer is actively pending, significantly reducing the opportunity for erroneous transfers to impact system reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If access to peripheral memory is continuously granted to masters, then DMA transfer efficiency is improved, but the window of opportunity for erroneous transfers increases

Engineering Contradiction:
Improveprotection against erroneous transfersVSAvoidDMA transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies periodic action by dynamically granting and revoking master access rights in periodic cycles tied to the DMA request state. The access control circuitry continuously monitors the pending request status and toggles access permissions accordingly - granting access when a DMA request is pending and revoking it when the transfer completes. This periodic re-evaluation of access rights maintains high DMA transfer efficiency during active transfers while minimizing the time window for potential erroneous transfers, thus balancing productivity and reliability.

Inventive Principle:
Principle #19Periodic action

3Reliability

If access control is strictly enforced at all times, then security against unauthorized access is improved, but system performance deteriorates due to continuous checking

Engineering Contradiction:
Improveaccess control securityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the access control function into a dedicated access control circuitry unit that operates independently from the main processing logic. This separate circuitry continuously monitors DMA request status and manages access permissions without burdening the main system performance. By extracting this security function into specialized hardware, the system maintains strict access control security while minimizing the performance overhead, as the access control operations are handled by dedicated logic rather than general-purpose processors.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9846663B2Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product
Publication Date: 2017.12.19 NXP USA INC
  • US9846663B2 patent drawing
  • US9846663B2 patent drawing
  • US9846663B2 patent drawing

AI summary

A method of controlling direct memory access of a peripheral memory of a peripheral by a master is described. The method includes checking whether there is a pending request from the peripheral for a direct memory access service, establishing whether an access condition is satisfied in dependence on at least whether there is a pending request, and, if the access condition is satisfied, granting access to the master. Also, an associated device and an associated computer program product are described.