DMA Channel State Determination for Multi-Core Data Transfer
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Solution Overview
Problem
In multi-core systems, frequent state checking between source and destination cores complicates data transmission and leads to resource wastage due to unnecessary control cycles.
Innovation Solution
A Direct Memory Access (DMA) device with a channel state determining unit and data transmission processing unit that independently determines the availability of source and destination channels, allowing data transmission without requiring continuous state monitoring from the source core, and uses start signals to initiate data transfer when both channels are available.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source core continuously checks the availability of the destination channel before data transmission, then the data transmission reliability is improved, but the system complexity and resource consumption increase due to frequent state checking
Solution Approach 1:
The patent extracts the channel availability checking function from the source core and assigns it to the DMA device. The DMA device independently determines whether the destination channel is available by checking the destination channel start signal, eliminating the need for the source core to continuously monitor destination channel status. This reduces the control complexity and resource consumption of the source core while maintaining reliable data transmission.
Solution Approach 2:
The DMA device acts as an intermediary between the source core and destination core. It receives the destination channel start signal from the destination core, determines channel availability, and controls the data transmission process. This intermediary role simplifies the interaction between source and destination cores, reducing the need for frequent state checking by the source core.
2Productivity
If the source core monitors the destination channel state frequently, then the data transmission efficiency is improved, but the CPU performance deteriorates due to waste of control cycles
Solution Approach 1:
The DMA device performs self-service by independently determining the availability of the destination channel through the destination channel start signal. This eliminates the need for the source core to spend CPU cycles monitoring destination channel status, while the DMA device ensures efficient data transmission by autonomously managing the transmission control based on channel availability.
3Reliability
If the DMA device requires both source channel and destination channel availability confirmation before transmission, then the data transmission reliability is improved, but the program implementation complexity increases
Solution Approach 1:
The patent merges the source channel availability checking (performed by the source core) and destination channel availability checking (performed by the DMA device) into a unified transmission control process. The DMA device integrates both channel state determinations and automatically manages the data transmission when both channels are available, simplifying the overall program implementation while ensuring reliable transmission.
Data Source
AI summary
A Direct Memory Access (DMA) device for a multi-core system, and an operating method of the DMA device are provided. The DMA device includes a channel state determining unit to determine whether at least one channel among a source channel and a destination channel is available, the source channel being formed between a source core and the DMA device, and the destination channel being formed between a destination core and the DMA device, and a data transmission processing unit to process data of the source core to be transmitted to the destination core, when both the source channel and the destination channel are determined to be available.