DMA Coalescing for Network Interface Power Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The frequent and unpredictable nature of Direct Memory Access (DMA) operations in network interface controllers (NICs) prevents host systems from entering deep power-saving states, as they create short, choppy periods of inactivity, which are insufficient for prolonged low power modes.
Innovation Solution
Implementing DMA coalescing, where NICs buffer packets and initiate DMA transfers in concentrated periods, allowing the host system to enter deeper power-saving modes by reducing NIC-initiated DMA activity frequency and aligning it with longer idle periods, and dynamically adjusting the coalescing timer based on system conditions and network traffic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If DMA operations are performed frequently to handle network packets, then packet processing capability is improved, but power consumption increases and deep power-saving states cannot be entered
Solution Approach 1:
Multiple individual DMA operations for separate packets are merged into a single coalesced DMA operation that transfers multiple packets together. The NIC buffers incoming packets and initiates DMA transfers in concentrated periods, combining what would otherwise be numerous separate memory access operations into fewer, larger transfers.
Solution Approach 2:
DMA operations are transformed from a continuous or frequent periodic pattern into a less frequent periodic pattern through coalescing. The system introduces longer idle periods between DMA operations by buffering packets and initiating transfers in concentrated bursts, allowing the system to enter deep power-saving states during the extended idle periods.
2Use of energy by stationary object
If DMA operations are coalesced to extend idle periods, then power-saving states are improved, but packet processing latency increases
Solution Approach 1:
The DMA coalescing parameters are made dynamic rather than static. The system monitors system conditions and network traffic characteristics to adaptively adjust coalescing timing and buffer thresholds, optimizing the balance between power savings and latency based on current workload demands.
Solution Approach 2:
The system changes key parameters of DMA operations including buffer size thresholds, coalescing time windows, and transfer timing to optimize performance. By dynamically adjusting these parameters based on traffic volume and system utilization, the system can minimize latency while maintaining extended idle periods for power-saving states.
3Duration of action of stationary object
If DMA transfers are concentrated in shorter periods, then idle period duration is improved, but DMA activity frequency increases
Solution Approach 1:
Packets are buffered in advance during the coalescing window before the actual DMA transfer occurs. This preliminary buffering action allows the system to accumulate multiple packets and then perform a single concentrated transfer, creating longer subsequent idle periods while the buffering process handles the incoming packet flow.
Data Source
AI summary
In general, in one aspect, a method includes determining a repeated, periodic DMA (Direct Memory Access) coalescing interval based, at least in part, on a power sleep state of a host platform. The method also includes buffering data received at the device in a FIFO (First-In-First-Out) queue during the interval and DMA-ing the data enqueued in the FIFO to a memory external to the device after expiration of the repeated, periodic DMA coalescing interval.