DMA Controller Adaptive Handshake for Microcontroller Latency

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Solution Overview

Problem

Existing data transfer methods using direct memory access (DMA) controllers in microcontrollers suffer from increased latency due to the need for a handshake procedure for each memory access, which limits system performance and efficiency.

Innovation Solution

Implementing a system that allows a controller to adapt data transfer handshake signals based on an access type, enabling dynamic burst adaptation and reducing latency by allowing peripherals to indicate readiness and optimize data transfer without requiring handshake signals for each memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a handshake procedure is used for each memory access in DMA transfer, then data transfer reliability is improved, but transfer latency increases

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidtransfer latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the data transfer process into different access types (single access, burst access, etc.), allowing the system to choose appropriate handshake procedures for each segment. This enables selective application of handshake protocols only where necessary, reducing overall latency while maintaining reliability for critical transfers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic access type selection that adapts handshake signal usage based on peripheral readiness and transfer requirements. The system dynamically switches between different access modes (e.g., from burst to single access) to optimize the balance between reliability and latency for each specific transfer scenario.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If handshake signals are used for each memory access, then data transfer accuracy is improved, but system performance deteriorates

Engineering Contradiction:
Improvedata transfer accuracyVSAvoidsystem performance
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies different quality levels of handshake procedures to different parts of the data transfer process. Critical data transfers use full handshake protocols for high accuracy, while less critical transfers use simplified procedures, optimizing the balance between accuracy and performance for each specific case.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameters of handshake signal usage based on access type and peripheral state. By adjusting handshake intensity and frequency dynamically, the system maintains data transfer accuracy where needed while improving overall system performance through reduced protocol overhead in appropriate scenarios.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If the processor waits for data transfer completion, then data transfer control is improved, but processor productivity decreases

Engineering Contradiction:
Improvedata transfer controlVSAvoidprocessor productivity
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the data transfer control function from the main processor by implementing autonomous access type determination and handshake management in the DMA controller. This allows the processor to initiate transfers and continue with other operations while the DMA controller independently manages the transfer process, significantly improving processor productivity while maintaining control through periodic status checks.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent enables the DMA controller to self-manage the data transfer process by autonomously selecting access types and managing handshake signals without continuous processor intervention. The controller monitors peripheral readiness and adjusts transfer parameters independently, providing effective data transfer control while freeing the processor for other productive tasks.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9734102B2Data transfer
Publication Date: 2017.08.15 ATMEL CORP
  • US9734102B2 patent drawing
  • US9734102B2 patent drawing
  • US9734102B2 patent drawing

AI summary

A controller coupled to a peripheral identifies an access type used by the controller for data transfer. The controller performs operations including: sending information to a peripheral coupled to a controller, the information indicating an access type for which the controller is configured for data transfer; monitoring a communication link with the peripheral for a signal indicating that the peripheral is ready to perform a data transfer according to the access type; and performing, in response to a receipt of the signal through the communication link, the data transfer using data transfer handshake signals that are adapted according to the access type.