DMA Controller Input-Output Port for Address Signal Management
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Solution Overview
Problem
Conventional DMA controllers require significant CPU intervention and increased circuit size due to the need for multiple storage areas to manage address information for multiple banks, leading to high CPU load and inefficient data transfer.
Innovation Solution
A data transfer control device with an input/output port that receives and processes address signal groups from a module, allowing the memory access controller to perform memory access without CPU intervention, reducing the need for multiple storage areas and minimizing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the DMA controller uses multiple storage areas to store address information for multiple banks, then the CPU can perform address pre-setting processing, but the circuit size increases
Solution Approach 1:
The patent extracts the address information storage function from the CPU and implements it directly in the DMA controller. The DMA controller includes storage areas (registers) that automatically store address information for multiple banks, eliminating the need for CPU intervention in address pre-setting and reducing the overall circuit size by removing unnecessary CPU resources.
Solution Approach 2:
The DMA controller performs self-service by automatically managing address information storage and retrieval. The controller includes internal storage areas that automatically store address information for multiple banks without requiring CPU commands, enabling the system to serve itself in address management tasks.
2Productivity
If the CPU performs address pre-setting processing for multiple banks, then data transfer can be controlled, but the CPU load increases
Solution Approach 1:
The patent extracts the address pre-setting processing function from the CPU and relocates it to the DMA controller. The DMA controller includes storage areas that automatically store address information for multiple banks, eliminating the need for CPU intervention in address pre-setting and reducing the overall circuit size by removing unnecessary CPU resources.
Solution Approach 2:
The DMA controller performs self-service by automatically managing address information storage and retrieval. The controller includes internal storage areas that automatically store address information for multiple banks without requiring CPU commands, enabling the system to serve itself in address management tasks.
3Extent of automation
If the DMA controller stores address information for multiple banks, then data transfer can proceed without frequent CPU interruptions, but the circuit size increases
Solution Approach 1:
The patent extracts the address information storage function from the CPU and implements it directly in the DMA controller. The DMA controller includes storage areas (registers) that automatically store address information for multiple banks, eliminating the need for CPU intervention in address pre-setting and reducing the overall circuit size by removing unnecessary CPU resources.
Data Source
AI summary
An image processing module input/output port in a DMAC includes an input part which receives second address information and an addressing request signal from an image processing module and an output part which outputs a reply signal indicating valid reception of the second address information to the image processing module. The image processing module input/output port can perform signal input/output control processing of returning, in response to the addressing request signal, the reply signal indicating confirmation of valid reception of the second address information to the image processing module when valid reception of the second address information is confirmed. A memory access controller performs memory access processing of accessing a storage area to be accessed in a memory based on the first address information (=the second address information) received via the image processing module input/output port.