DMA Controller Mode Register for Secure Non-Secure Sharing
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Solution Overview
Problem
Existing System on a Chip (SoC) designs require separate DMA controllers or channels for secure and non-secure modes, leading to resource inefficiency as the same security level DMA controller or channel is not always utilized, resulting in increased resource usage.
Innovation Solution
A direct memory access (DMA) controller with a mode register and configuration interface that allows switching between secure and non-secure modes using a single DMA channel, enabling access to secure and non-secure memory areas based on register values, thereby reducing hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate DMA controllers or channels are used for secure and non-secure modes, then data security is ensured, but hardware resources are wasted due to underutilization
Solution Approach 1:
The patent implements a universal DMA controller that can operate in both secure and non-secure modes by introducing a mode register that controls the security attribute. The same DMA controller hardware is shared between two security domains through the security attribute mechanism, allowing one controller to perform multiple functions that previously required separate dedicated controllers.
Solution Approach 2:
The patent changes the operational parameter of the DMA controller by introducing a mode register that can be set to different values (secure mode or non-secure mode). This parameter change allows the controller to dynamically adjust its security behavior and access permissions without requiring physical hardware changes, enabling resource sharing while maintaining security boundaries.
2Reliability
If separate DMA controllers are used for different security levels, then security isolation is maintained, but device complexity increases
Solution Approach 1:
The patent reduces device complexity by designing a single universal DMA controller that serves both secure and non-secure modes, eliminating the need for multiple separate controllers. The controller maintains security isolation through software-configurable security attributes rather than hardware separation, simplifying the overall system architecture.
Solution Approach 2:
The patent introduces a mode register as an intermediary component that mediates between the processor and the DMA controller's security behavior. This single register acts as a switch that determines whether the controller operates in secure or non-secure mode, providing a simple mechanism for security management without adding complex hardware structures.
3Quantity of substance
If a single DMA controller is shared between secure and non-secure modes, then hardware resources are saved, but security management complexity increases
Solution Approach 1:
The patent simplifies security management by reducing it to a simple parameter change - setting the mode register to either secure or non-secure value. This single parameter controls the security attribute of the DMA controller, making security management straightforward rather than complex, as it requires only register configuration rather than complex security protocols.
Data Source
AI summary
A direct memory access (DMA) controller, an electronic device that uses the DMA controller, and a method of operating the DMA controller are provided. The DMA controller is configured to access a memory that contains a secure area and a non-secure area. The method of operating the DMA controller includes the following steps: searching for a DMA channel that is in an idle state in the DMA controller; setting a register value of a mode register of the DMA channel such that the DMA channel operates in a secure mode; setting a memory address register and a byte count register of the DMA channel; and controlling the DMA channel to transfer data based on the memory address register and the byte count register.