DMA Controller Search Key Processing via ILA Packets

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Solution Overview

Problem

Inefficient communication of search keys in multi-processor packet processing systems can degrade the performance of shared buses, leading to performance issues in lookup operations.

Innovation Solution

A device with a shared memory, processor, Direct Memory Access (DMA) controller, and Interlaken Look Aside (ILA) interface circuit is used to efficiently process and communicate search keys, where the DMA controller generates requests, receives data, selects search keys, and generates ILA packets for external transactional memory devices, minimizing bus cycles through chunk-based data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple processors share a single bus for search key communication, then device complexity is reduced, but bus utilization efficiency deteriorates

Engineering Contradiction:
Improvebus structure complexityVSAvoidbus utilization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the search key data set into multiple chunks and processes them in batches rather than individually. The DMA controller divides the search key data set into first chunk, second chunk, and subsequent chunks, processing each chunk through a standardized sequence of operations. This segmentation allows efficient bus utilization by reducing the number of individual bus transactions while maintaining the ability to handle multiple search keys.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a DMA controller as an intermediary between the processors and the shared memory system. The DMA controller manages the complex bus transactions, descriptor processing, and data chunk management, freeing the processors from direct bus management overhead. This intermediary handles the inefficient bus communication tasks, allowing processors to focus on higher-level processing while the DMA controller optimizes bus utilization through batched chunk-based transfers.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If search keys are processed individually, then processing precision is maintained, but processing speed deteriorates

Engineering Contradiction:
Improvesearch key processing accuracyVSAvoidsearch key processing speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent implements continuous processing by maintaining descriptor chains that link multiple search key chunks together. Instead of stopping and restarting processing for each individual search key, the system continuously processes chunks through a linked descriptor structure. The completion notification mechanism ensures that processing continues seamlessly from one chunk to the next, maintaining both speed and accuracy through uninterrupted batch processing.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary actions by pre-loading search key data sets into memory and preparing descriptor structures before actual processing begins. The system pre-organizes the search key data into manageable chunks with associated descriptors containing all necessary control information (data set identifier, chunk size, next descriptor pointer). This preliminary preparation enables rapid sequential processing without repeated setup overhead, maintaining precision while improving speed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9632959B2Efficient search key processing method
Publication Date: 2017.04.25 NETRONOME SYSTEMS INC
  • US9632959B2 patent drawing
  • US9632959B2 patent drawing
  • US9632959B2 patent drawing

AI summary

An efficient search key processing method includes writing a first and a second search key data set to a memory, where the search key data sets are written to memory on a word by word basis. Each of the first and second search key data sets includes a header indicating a common lookup operation to be performed and a string of search keys. The header is immediately followed in memory by a search key. The search keys are located contiguously in the memory. At least one word contains search keys from the first and second search key data sets. The memory is read word by word. A first plurality of lookup command messages are sent based on the search keys included in the first search key data set. A second plurality of lookup command messages are sent based on the search keys included in the second search key data set.